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Wooyeol Choi,Kihyun Kim,Youngwoo Kwon IEEE 2010 IEEE microwave and wireless components letters Vol.20 No.11
<P>A frequency divider with a very low dc power consumption of 3 mW is demonstrated using 0.15 μm GaAs pHEMT technology at W-band. The frequency divider is based on an injection lock topology using a cascode field effect transistor (FET) structure. For low-power operation, the oscillator is configured in series-feedback topology using the upper FET as a gain cell and the lower FET as a capacitive feedback element. An impedance-transforming transmission line is inserted between the two FET's to further reduce the dc power consumption. Besides, the locking range is enhanced by adding varactor tuning at the gate of the upper FET. When the input power of 0 dBm is applied, the frequency divider operates at 77 GHz with an output power of -20 dBm in a bandwidth of 4.2 GHz (5.5%) while consuming only 3 mW from 1V power supply. Overall bandwidth with varactor tuning is from 68.4 to 82.0 GHz (13.6 GHz, 18.1%). To our knowledge, the measured power consumption of the presented frequency divider is among the lowest from the reported W-band frequency dividers.</P>
Wooyeol Kim 한국인터넷방송통신학회 2021 Journal of Advanced Smart Convergence Vol.10 No.2
Recently, artificial intelligence(AI) has been used throughout society, and social interest in it is increasing. Accordingly, the necessity of AI education is becoming a big topic in the education field. As a response to this trend, the Korean education authorities have also announced plans for AI education, and various studies have been performed in academic field to revitalize AI education in the future. However, the curriculum research on what differentiates AI education from existing SW education and what and how to train AI is still in its infancy. In this paper, Therefore, we focused on the experiences of elementary school students in solving problems in their own lives, and developed a teaching-learning model based on design-based research so that students can design a problem-solving process and experience the process of feedback. We applied the developed teaching-learning model to the problem-solving process and confirmed that it increased students' understanding and satisfaction with AI education.
Wooyeol Choi,Gwangrok Jung,Jihoon Kim,Youngwoo Kwon IEEE 2009 IEEE transactions on microwave theory and techniqu Vol.57 No.12
<P>An accurate scalable small-signal RF CMOS model applicable to high frequencies is developed using 3-D electromagnetic (EM)-based extraction of parasitic elements. Due to multimetal layers, vertical interconnects, substrate loss and substrate-contact rings, the extrinsic parasitic network of CMOS field-effect transistor (FET) is more complicated than GaAs FETs and does not follow simple scaling rules. In this work, we have employed 3-D EM simulation to derive the scaling rules of the CMOS FETs. After de-embedding the effects of the pads and the interconnect lines using a pair of dummy patterns with different reference planes, the layout-dependent extrinsic network parameters are extracted using 3-D full-wave EM simulations. Based on the extracted parameters, new scaling rules are proposed for the extrinsic networks for 0.13 and 0.18 ¿m CMOS processes. A complete scalable RF CMOS model is constructed by combining the scalable extrinsic network with the intrinsic CMOS network, and has been validated by comparing the predicted and measured <I>S</I>-parameters of the scaled devices from a family of 0.18 and 0.13 ¿m CMOS FETs up to 50 and 75 GHz, respectively. In order to validate the scalable models for circuit applications, 30 and 60 GHz small-signal amplifiers have been designed using optimum size devices predicted from the scalable models. The measured results of the circuits are in good agreement with the simulation, validating the proposed modeling methods.</P>
Wooyeol Choi,Konggyun Park,Youngmin Kim,Kihyun Kim,Youngwoo Kwon IEEE 2010 IEEE transactions on microwave theory and techniqu Vol.58 No.12
<P>A beam-forming antenna module is demonstrated using an integrated CMOS beam-former chip and a simple two-metal layer printed circuit board at V-band. The beam-former circuit integrates an absorptive single-pole four-throw switch together with a 4 × 4 Butler matrix using a 0.13-μm CMOS process. The entire insertion loss of the integrated beam former integrated circuit (IC) is around 7.5 dB at 60 GHz, among which 3 dB is attributed to the Butler matrix. The overall phase error is within ±12%. The antenna module employs backside radiation structure using series-fed patch antenna arrays to suppress parasitic radiation. The measured radiation pattern shows good agreement with the simulation. To the best of our knowledge, this is the first demonstration of the beam-forming antenna module using a single-chip CMOS switched beam-former IC at V-band.</P>
Phase Locked Loop Sub-Circuits for 24 ㎓ Signal Generation in 0.5 ㎛ SiGe HBT technology
Wooyeol Choi,Youngwoo Kwon 대한전자공학회 2007 Journal of semiconductor technology and science Vol.7 No.4
In this paper, sub-circuits for 24 ㎓ phase locked loops(PLLs) using 0.5 ㎛ SiGe HBT are presented. They are 24 Ghz voltage controlled oscillator(VCO), 24 ㎓ to 12 GHz regenerative frequency divider(RFD) and 12 ㎓ to 1.5 ㎓ static frequency divider. 0.5 ㎛ SiGe HBT technology, which offers transistors with 90 ㎓ fMAX and 3 aluminum metal layers, is employed. The 24 ㎓ VCO employed series feedback topology for high frequency operation and showed -1.8 to -3.8 ㏈m output power within tuning range from 23.2 ㎓ to 26 ㎓. The 24 ㎓ to 12 ㎓ RFD, based on Gilbert cell mixer, showed 1.2 ㎓ bandwidth around 24 ㎓ under 2 ㏈m input and consumes 44 ㎃ from 3 V power supply including I/O buffers for measurement. ECL based static divider operated up to 12.5 ㎓ while generating divide by 8 output frequency. The static divider drains 22 ㎃ from 3 V power supply.
한국어 고급 학습자의 용언 활용형 처리에 대한 점화 실험 연구
임우열(Wooyeol Lim),이선진(Sunjin Lee),김영주(Youngjoo Kim) 한국응용언어학회 2020 응용 언어학 Vol.36 No.2
This study investigated how L2 Korean advanced learners process regularly and irregularly inflected forms of Korean verbs, and whether this processing mechanism follows a single mechanism account or a dual mechanism account. In addition, it examined the effect of the learner’s working memory capacity on the reaction time or/and the accuracy rate in the chosen priming tasks. The patterns of facilitation on present tense verb targets were examined in three experiments. In the study, there were 72 participants with TOPIK level 6, who performed three lexical decision tasks with either a masked visual prime presented during 43ms (Experiment 1) or 230ms (Experiment 2) or an auditory prime (Experiment 3). Next, the priming for six different types of verbal inflections were compared: regular verbs with no orthographical or phonological changes, regular verbs with only phonological changes to their stem, regular verbs with only orthographical changes, irregular verbs with their stem omitted or alternated, irregular verbs with changes in their endings and irregular verbs with changes in both their stem and endings. The study found determined that (i) no priming effects in either regular or irregular inflections revealed in most conditions, which supports a single mechanism account, and (ii) the influence of working memory capacity of L2 learners showed as higher the working memory was, faster the reaction time was completed in those cases.
LED 헤드램프의 배광 시 광저하율 추정을 통한 전류치 최적화
이우열(Wooyeol Lee),한희복(Huipok Han) 한국자동차공학회 2022 한국자동차공학회 부문종합 학술대회 Vol.2022 No.6
본 연구는 LED 헤드램프 배광 법규 충족을 위한 전류의 값 최적화 방법을 제시하고 있다. 이를 위해 배광 측정 시, 램프 내 온도 상승에 따른 광저하율 값을 추론하여 광저하 발생 시 필요한 전류의 증대 값을 최적화하고 있다. This study suggests a method of optimizing the value of current to satisfy LED headlamp light distribution regulations. To this end, when measuring light distribution, the value of the increase in current required for light deterioration is optimized by inferring the value of the light reduction rate according to the temperature increase in the lamp.