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A Feed forward Differential Architecture for the Analog PRML Viterbi Decoder
Maheshwar Pd. Sah(마헤스워 사),Changju Yang(양창주),Hyongsuk Kim(김형석) 제어로봇시스템학회 2010 제어로봇시스템학회 합동학술대회 논문집 Vol.2010 No.12
In this paper, an analog parallel processing circuit in the form of feed forward differential architecture is proposed to implement on analog PRML Viterbi decoder. It is based on the idea that the decoding of PRML is done mainly with the information of the first several number of stages. Several benefits including higher speed, no path memory, no trace back unit and no A/D converter are required for the decoding of the signals. Most of the conventional analog parallel processing-based PRML decoders are differential architecture with the feedback, where states are changed depending on the previous decoded data. The architecture used in this paper is without feedback, where error metric accumulation is allowed to start from odd and even input of subtrellis. It is simpler than that of the conventional analog parallel processing structure with similar decoding performance. The feature of proposed architecture is investigated through simulation results.
Memristor Circuit for Artificial Synaptic Multiplication
Maheshwar Pd. Sah(마헤스워 사),Changju Yang(양창주),이청호,Hyongsuk Kim(김형석) 제어로봇시스템학회 2011 제어로봇시스템학회 각 지부별 자료집 Vol.2011 No.7
A memristor circuit is proposed to synaptic multiplication of artificial neural networks by using ohms law v = M(q) x i. The weight and synaptic processing can be performed positively or negatively through a share input terminal. Several benefits like compact integration, lower power consumption and analog processing is applicable in the circuit. The simulations of the proposed circuit are analyzed with Hewlett-Packard (HP) TiO₂ memristor model.
Analysis of Electrical Features of Serially and Parallelly connected Memristor Circuits
람 카지 부다토키,마헤스워 사,김주홍,김형석,Budhathoki, Ram Kaji,Sah, Maheshwar Pd.,Kim, Ju-Hong,Kim, Hyong-Suk The Institute of Electronics and Information Engin 2012 電子工學會論文誌-CI (Computer and Information) Vol.49 No.5
저항, 콘덴서, 및 인턱터와 함께 4의 회로 소자로 알려진 멤리스터가 개발되었으나, 아직 그 전기적 특성이 충분히 해석되지 않고 있다. 멤리스터들은 연결된 극성에 따라서 저항이 증가 혹은 감소하며, 직렬 혹은 병렬연결 형태에 따라서 그 동작 특성이 다양해진다. 본 연구에서는 HP의 $TiO_2$ 멤리스터를 모델로 하여 다양한 직 병렬회로에 대한 전기적 특성을 분석하였다. 이를 위해서 사인파 입력신호에 대해서 나타나는 전압-전류 간의 히스테르시스 루프의 다양한 모양을 분석하였다. 본 멤리스터 연구결과는 멤리스터 소자에 대한 특성 이해와 논리 회로 및 뉴런 셀에의 응용회로들의 특성을 분석하는데 유용하게 사용될 수 있다. Memristor which is known as fourth basic circuit element has been developed recently but its electrical characteristics are not still fully understood. Memristor has the incremental and decremental feature of the resistance depending upon the connected polarities. Also, its operational behavior become diverse depending on its connection topologies. In this work, electrical characteristics of diverse types of serial and parallel connections are investigated using the HP $TiO_2$ model. The characteristics are analyzed with pinched hystersis loops on the V-I plane when sine input signal is applied. The results of the work would be utilized usefully for analyzing the characteristics of memristor element and applications to logic circuit and neuron cells.