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Sigma-Delta (Σ-Δ) ADC for Complex Sensor Applications
Sangyong Lee,Wonki Park,Kyongwon Min,Byong-Deok Choi,SungChul Lee 대한전자공학회 2009 ITC-CSCC :International Technical Conference on Ci Vol.2009 No.7
In this paper, a sigma-delta (Σ-Δ) analog-to-digital converter (ADC) is presented with 14.97-bit accuracy. The ADC is composed of fourth-order single-loop single-bit sigma-delta (Σ-Δ) modulator and digital decimation filter. The modulator with an oversampling ratio of 128 and a signal bandwidth of 4㎑ has been designed in a 0.35㎛ CMOS technology. The designed decimation filter has been verified using an FPGA. The Σ-Δ modulator consumes 3㎽ from a single 3.3V supply voltage.