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Chang, Jungyun,Yu, Young-Jun,Na, Jung Hoon,An, Jongdeok,Im, Chan,Choi, Dong-Hoon,Jin, Jung-Il,Lee, Seung Hee,Kim, Young Kwan Wiley Subscription Services, Inc., A Wiley Company 2008 Journal of polymer science Part B, Polymer physics Vol.46 No.22
<P>The different effects on the photodegradation-induced photoluminescence (PL) of π-conjugated polymeric thin films upon the doping of Ir(III) containing triplet emitters in ambient conditions at room temperature were investigated. In this study, we prepared spin-coated thin films using three different polymer matrices including poly(9-vinylcarbazole) (PVK), poly[9,9-bis(2-ethylhexyl)fluorene-2,7-diyl] (PF2/6), and poly[2-(5′-cyano-5′-methyl-hexyloxy)-1,4-phenylene] (CNPPP) derivatives doped with Ir(III) containing triplet emitters: Ir(III) bis[(4,6-fluorophenyl)-pyridinato-N,C<SUP>2</SUP>′] picolinate (FIrpic), or Ir(III)fac-tris(2-phenylpyridine) (Ir(ppy)<SUB>3</SUB>), or Ir(III)bis(2-(2′-benzothienyl) pyridinato-N-acetylacetonate) (Ir(btp)<SUB>2</SUB>acac). Using the doped films, and their neat films, on quartz substrates, the UV-Visible absorption (UV-Vis) and PL spectra were recorded under continuous illumination with the excitation wavelengths at the absorption maxima of the corresponding matrix polymers. The dopant effects on the photodegradation-induced PL were extracted from the kinetic data obtained from the doped films by subtracting the mutual degradation kinetics of their corresponding neat films. The obtained dopant effects show a strong correlation between the photo-induced PL degradation and the exciton migration behaviors. © 2008 Wiley Periodicals, Inc. J Polym Sci Part B: Polym Phys 46: 2395–2403, 2008</P>
Delay Monitoring System With Multiple Generic Monitors for Wide Voltage Range Operation
Kim, Jongho,Choi, Kiyoung,Kim, Yonghwan,Kim, Wook,Do, Kyungtae,Choi, Jungyun IEEE 2018 IEEE transactions on very large scale integration Vol.26 No.1
<P>As the semiconductor process technology continuously scales down, circuit delay variations due to manufacturing and environmental variations become more and more serious. These delay variations are hardly predictable and thus require an additional design margin, which impedes the chance to reduce the area and power consumption of a chip. One of the best solutions to alleviate this problem is to measure circuit delays at run time and control the supply voltage accordingly through a closed-loop dynamic voltage and frequency scaling (DVFS) scheme. The key issue of this scheme is the delay mismatch between the monitoring circuit and the target block. A large delay mismatch might lose the advantage of the closed-loop DVFS. It becomes much worse as a circuit block operates in wider voltage range, from near-threshold voltage to super-overdrive voltage. This paper proposes novel delay monitoring systems with multiple generic monitors for wide voltage range operation, which provide a better delay correlation between the monitoring circuit and the target block compared to conventional monitoring approaches. The proposed approaches reduce the maximum error by up to 91% for a popular processor core in a 14-nm FinFET process technology, thereby bring a decrease of design margin, lower-power, and/or lower-cost design.</P>
최원석(Wonseok Choi),강상우(Sangwoo Kang),서정연(Jungyun Seo) 한국정보과학회 2009 한국정보과학회 학술발표논문집 Vol.36 No.1
대화 시스템은 효율적인 대화 관리를 위하여 대화 전략(Dialog Strategy)을 사용한다. 하지만 효과적인 대화 전략을 작성하기 위해서는 전문가의 많은 시간과 노력이 필요하다. 따라서 최적화된 대화 전략을 자동을 생성하기 위한 연구가 진행되고 있으며, 그 중 많은 연구가 기계 학습 방법의 한 종류인 강화학습(Reinforced Learning)을 이용하고 있다. 강화학습은 대화 전략을 학습하는데 적합하지만 충분한 학습 대화 자료를 확보하는데 어려움이 많고 학습속도가 느리다. 따라서 본 논문에서는 기존의 연구와 유사한 성능을 유지하면서 적은 양의 학습 데이터를 사용하고 학습 속도를 향상시킨 모델을 제안한다. 제안한 방법은 학습 과정에서 현재 상황에 보다 적합하다고 예측되는 행동들을 사용자 모델(User Model) 정보를 기반으로 선택적으로 시도하는 것이다. 이것은 시스템이 불필요하게 탐색해야 할 공간을 줄임으로써 학습되는 대화 전략의 질(Quality)을 유지하면서도 학습 속도를 증가 시킬 수 있다. 실험 결과에서 제안한 모델은 비교 시스템에 비해 대화 전략 학습 속도가 35% 정도 증가하였으며 학습에 필요한 데이터의 양도 46% 정도로 줄일 수 있었다.