Performance Assessment and Optimization of Vertical Nanowire TFET for Biosensor Application

Parveen Kumar,Balwinder Raj 한국전기전자재료학회 2022 Transactions on Electrical and Electronic Material Vol.23 No.6

This paper reports the performance assessment of vertical silicon nanowire TFET (V-siNWTFET) design for biosensor applications using dielectric-modulation and gate underlap technique. The sensitivity of the V-siNWTFET is recognizing by immobilizing the different biological molecules such as lipids, biotin, uricase, protein, Gox, streptavidin, uriease, zein etc. in the cavity region which is created under the gate electrode and source oxide. The performance analysis is observed by varying the relative permittivity of the different biomolecules and analyzes the parametric variation both for neutral and charged biomolecules. The sensitivity of the biosensor has been detecting in the terms of drain current (I D), threshold voltage (V TH), subthreshold slope (SS), transconductance (g m), and I ON /I OFF ratio. The proposed device structure has capable to reduce the leakage currents and high sensitivity biosensor design in the nanoscale regimes. The obtained best optimum parameters of the proposed devices are I ON (1.37E-08 A/μm), I OFF (9.44E-19 A/μm), SS (29.97 mV/dec) and I ON /I OFF (4.29E + 10) ratio with gate work-function (ϕ gate = 4.8 eV) and uniformly doped (1 × 10 -19 cm -3 ) silicon nanowire at drain to source voltage (V DS = 1.0 V). The higher sensitivity of the proposed V-siNWTFET for Biosensor is observed for Zein biomolecules (K = 5).

Design and Investigation of Junctionless DGTFET for Biological Molecule Recognition

Girish Wadhwa,Priyanka Kamboj,Jeetendra Singh,Balwinder Raj 한국전기전자재료학회 2021 Transactions on Electrical and Electronic Material Vol.22 No.3

This work utilizes the dielectric modulated detection technique within a junctionless tunnel fi eld-effect transistor (JLTFET) to detect various charged and neutral biomolecules. The electrostatic properties of the proposed dielectric modulated junctionless double gate JLTFET (DM-JL DGTFET) are observed and analyzed to determine the biomolecules like uricase(k = 1.54), Glucose oxidase (k = 3.46), APTES (k = 3.57), keratin (k = 8) and gelatin (k = 14) lipid, carbohydrate, nucleic acid (DNA and RNA), and protein, etc. The SiO 2 (gate oxide) is etched and a cavity is shaped under the gate electrode in which the analytes are injected and thus the eff ective dielectric of the gate oxide is modulated. The injected charge or neutral analytes of the various biomolecules in the immobilized states are responsible to change the electrostatic characteristics of the DM-JL DGTFET device by varying the gate capacitance. The drain current, I ON /I OFF , subthreshold slope, and sensitivity of the DM-JL DGTFET are estimated to recognize the biomolecules. The DM-DGJLTFET shows noticeable sensitivity outcomes 15.2 × 10 11 for the charged biomolecules, especially the positively charged analytes.

Design and Analysis of Dual Source Vertical Tunnel Field Effect Transistor for High Performance

Soniya Badgujjar,Girish Wadhwa,Shailendra Singh,Balwinder Raj 한국전기전자재료학회 2020 Transactions on Electrical and Electronic Material Vol.21 No.1

An optimally designed Dual Source Vertical Tunnel Field Effect Transistors is proposed and investigated using technology computer aided design simulation. The vertical tunnel FET have dispersal of source channel drain in the vertical direction which will enhance the scalability of the simulated device. The benefit of the TFET is switching mechanism which is done by quantum tunnelling method through a barrier instead of thermionic emission over the barrier as that of conventional MOSFETs. The key of this paper, we have developed two-dimensional model of single drain with dual source n-type vertical tunnel field eff ect transistor. Further introduction to an ultra-thin channel among the drain and gate region will makes aggressiveimprovement in the numerical simulations of minimum threshold voltage (V T ) of 0.15 V and average subthreshold slope of 3.47 mV/decade. The variation effect in the channel thickness, source height, drain doping, source doping, temperature and work function has been simulated and examined by 2D silvaco TCAD tool. High ON current and low OFF current is recorded as 1.74 × 10 −4 A/μm and 6.92 × 10 −13 A/μm respectively with I ON /I OFF current ratio in order of 10 8 to 10 9 .

Detection of Biomolecules Using Charge-Plasma Based Gate Underlap Dielectric Modulated Dopingless TFET

Sachin K. Verma,Shailendra Singh,Girish Wadhwa,Balwinder Raj 한국전기전자재료학회 2020 Transactions on Electrical and Electronic Material Vol.21 No.5

In this Paper, Dielectric Modulated Dopingless Double Gate Transistor (DM-DLDGTFET) device is proposed for the free label detection of the charged and neutral biomolecules. A charge-plasma principle is used for label-free detection of biosensors to reduce the processing complexity and cost of nanoscale products. Firstly, the simulations for the proposed device are carried using Atlas and diff erent electrical parameters are analyzed using the same. It is observed that the dielectric constant and diff erent biomolecule charges for example, protein, DNA, enzyme, cell and many more molecules aff ects the electrical characteristic of the device. The deposition of diff erent workfunction materials over silicon body will do the formation of p+ source and n+ drain region in the DM-DLDGTFET. In addition, by etching the segment of the gate oxide layer to the source end for sensing biomolecules, a nano gap cavity is embedded within the dielectric gate. When biomolecule get immobilized at cavity region, the electrostatic properties of device for example, drain current, I on /I off , subthreshold slope, average subthreshold slope, sensitivity get infl uenced. The energy band diagram and the device’s surface potential for both neutral and charged biomolecules are also discussed. For the validation of the proposed DL-TFET structure, the simulation results are calibrated with reported results and signifi cant improvement are observed in the proposed structure.

Analysis of Device Parameter Variations in In 1-x Ga x As Based Gate Stacked Double Metal Surrounding Gate Nanowire MOSFET

Parveen Kumar,Sanjeev Kumar Sharma,Balwinder Raj 한국전기전자재료학회 2023 Transactions on Electrical and Electronic Material Vol.24 No.6

The research focuses on the design and analysis of a Gate Stacked Double Metal Surrounding Gate Nanowire MOSFET (DMSG-NWFET) using In 1-x Ga x As as the channel material. The performance of this MOSFET has been evaluated through simulations conducted using the silvaco ATLAS TCAD tool. The study examines the impact of Channel Length (L) and the ratio of L1/L on various DC characteristics, including Drain-Induced-Barrier-Leakage (DIBL), OFF-current (Ioff ), ON-current (Ion), Subthreshold Slope (SS), and threshold voltage (Vth). In-depth analysis has been performed by varying the indium portion (1-x) in the In 1-x Ga x As channel. Additionally, we investigate the radio frequency (RF) performances by considering the variation of the 'In' fraction and incorporating the cut-off frequency (f T ). The investigation demonstrates hat the In 1-x Ga x As based Gate Stacked Double Metal Surrounding-Gate Nanowire MOSFET exhibits superior DC and RF performance when an optimized fraction of In (Indium). We believe that the proposed device structure holds significant promise for low power VLSI applications.

Surface Potential and Drain Current 2D Analytical Modeling of Low Power Double Gate Tunnel FET

Dhruv Garg,Girish Wadhwa,Shailendra Singh,Ashish Raman,Balwinder Raj 한국전기전자재료학회 2021 Transactions on Electrical and Electronic Material Vol.22 No.6

This submitted work presents the 2-dimensional analytical modeling of Tunnel FET’s in consideration with the inherent properties of dual modulation effect. This eff ect explains the concept of regulating both gate and also the drain terminal biasing voltage on device surface potential and hence on the tunneling drain current model, which uses the device surface potential modeling as basis of deriving the TFET current model. The model is developed using basic 2-D Poisson’s equation. This analytical model embraces both the biasing voltage effect at gate and drain terminal respectively. The results procured from the submitted work are in perfect agreement with TCAD simulations results and depletion width of various regions defi ned in TFET is accurate and can also be explained theoretically.