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김익수(I. S. Kim),김민규(M. K. Kim),허대행(D. H. Huh),윤진열(J. Y. Yoon),한기선(G. S. Han) 대한전기학회 2007 대한전기학회 학술대회 논문집 Vol.2007 No.4
This paper represents the criteria of earthing system for substation design in Korea. The construction of new substations and expansion of existing facilities are commonplace projects in KEPCO(Korea Electric Power Corporation). The KEPCO has had the only design criteria, which need to be adequate criteria considering the new technology and environment in Korea.
얼굴영상의 고속 검색을 위한 병렬기억장치와 병렬처리기 구조
박종원,이형,김원봉,한기선 忠南大學校 産業技術硏究所 1997 산업기술연구논문집 Vol.12 No.1
There has been a research on the facial recognition and retrieval algorithm since 1990. In this paper, a parallel memory system and parallel processor architecture is proposed in order to process the facial recognition and retrieval algorithm in real time. A serial algorithm is developed for the parallel memory system and parallel processor architecture, parallelized, and then stored in the control memory in the parallel memory system and parallel processor architecture after converted into binary program. The parallel memory system and parallel processor architecture consists of a control unit, 144 PE(Processing Element)s, and 12 Park's Multi-access memory system which has 13 memory modules per each one. The parallel memory system and parallel processor architecture is simulated by CADENCE Verilog-XL which is a package for the hardware simulation. With the same simulated result as that the serial algorithm, the speed ratio of the parallel algorithm to the serial one is 61.9.
문화재영상의 고속 검색을 위한 병렬기억장치와 병렬처리기 구조
박종원,윤희준,김원봉,한기선 忠南大學校 産業技術硏究所 1997 산업기술연구논문집 Vol.12 No.1
This paper proposes SIMD processor architecture which processes cultural assets image recognition and retrieval algorithm in real time. An serial algorithm which is developed for the SIMD processor architecture is parallellized. The SIMD process architecture consists of a control unit, 100 PE(Processing Element)s, and 10 Parks Multi-access memory system which has 11 memory modules per each one. The SIMD processor architecture is simulated by CADENCE Verilog-XL which is a package for the hardware simulation. With the same simulated result as that of the serial algorithm, the speed ration of the parallel algorithm the serial one is 43.9 SIMD processor architecture is quite effective for image processing.