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시뮬레이션을 통한 Tunneling Field Effect Transistor의 온도와 트랩 분포에 따른 전류 전달 특성 분석
이기태(Kitae Lee),이륭빈(Ryoongbin Lee),권대웅(Dae Woong Kwon),박의환(Euyhwan Park),이준일(Junil Lee),김시현(Sihyun Kim),박태형(Taehyung Park),김현민(Hyun-Min Kim),박병국(Byung-Gook Park) 대한전자공학회 2016 대한전자공학회 학술대회 Vol.2016 No.11
Tunneling field effect transistor (TFET) has been expected to replace conventional metal-oxide-semiconductor field effect transistor (MOSFET) in the field of low-power operation device. The traps in transistor can influence I-V characteristic of transistor. In this study, we investigate current transfer characteristics of TFET by temperature and trap distribution.
시뮬레이션을 통한 Double Gate Tunneling Field Effect Transistor의 최적화 연구
김현민(Hyun-Min Kim),이준일(Junil Lee),권대웅(Dae Woong Kwon),김장현(Jang Hyun Kim),박의환(Euyhwan Park),김시현(Sihyun Kim),박태형(Taehyung Park),이륭빈(Ryoongbin Lee),박병국(Byung-Gook Park) 대한전자공학회 2016 대한전자공학회 학술대회 Vol.2016 No.6
Tunneling field effect transistor (TFET) is expected to replace conventional Metal-oxide-semiconductor field effect transistor (MOSFET) in the field of low-power operation device. However, its relatively low on-current has still remained as a problem. This paper suggests the way to optimize TFET using technology computer aided design (TCAD) simulation. The effect of band gap energy and body thickness on the transfer characteristic was investigated.
시뮬레이션을 통한 TFET 소자에서의 Source-to-Gate Underlap/Overlap 길이에 따른 특성 변화 연구
김현민(Hyun-Min Kim),이준일(Junil Lee),권대웅(Dae Woong Kwon),박의환(Euyhwan Park),김시현(Sihyun Kim),이륭빈(Ryoongbin Lee),박태형(Taehyung Park),이기태(Kitae Lee),박병국(Byung-Gook Park) 대한전자공학회 2016 대한전자공학회 학술대회 Vol.2016 No.11
Tunneling field effect transistor (TFET) has been investigated as a substitute for a conventional metal-oxide-semiconductor field effect transistor (MOSFET) in the field of low-power operation device. Especially, the vertical TFET has been studied because it has high denity and merit for fabrication. In this paper, the source -to-gate underlap/overlap - dependent characteristic of TFET arising from a gate etch process in vertical TFET is investigated through a technology computer aided design (TCAD) simulation.