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시공성 향상을 위한 제4세대 H형강 기둥-보 약축접합부의 개발 및 성능평가
김필중,부윤섭,양재근,이은택,김상섭,Kim, Pil-Jung,Boo, Yoon-Seob,Yang, Jae-Guen,Lee, Eun-Taik,Kim, Sang-Seup 한국강구조학회 2011 韓國鋼構造學會 論文集 Vol.23 No.3
국내외적으로 강구조 약축접합부의 접합방법으로는 브라켓타입이 주로 사용되고 있다. 브라켓타입의 약축접합부는 기둥-보접합부를 공장에서 제작한 후, 현장에 운반하여 시공하므로 보이음부가 추가된다. 따라서 보이음부의 설치비용 및 공사기간이 증가되므로 강구조물의 경쟁력이 저하된다. 본 연구에서는 기존의 표준약축접합부를 개선하여 힘의 흐름이 명확하고, 접합상세가 간결하며, 시공성을 향상시킨 신형상 약축접합부를 제안하였다. 실험결과를 통하여 신형상 약축접합부는 기존의 표준약축접합부보다 최대내력이 크게 나타났으며, 또한 연성적으로 거동하는 것으로 나타났다. 여기서 기존의 표준약축접합부는 스칼럽 또는 보이음용접부에서 응력집중으로 인하여 파괴되는 반면에, 신형상 약축접합부는 응력이 집중되는 스칼럽 및 보이음용접부가 없으며, 또한 H형강기둥과 보를 결합하기 위한 용접플레이트의 두께를 자유롭게 조절할 수 있으므로 이러한 차이가 기둥-보접합부의 최대내력 증가 및 연성적 거동에 기여하는 것으로 판단된다. Bracket-type connection is often used for the weak-axis steel connection. In general, a beam-to-column connection for the bracket type is fabricated at the shop and abeam splice is additionally attached to the bracket in the site. Therefore, steel construction would not be competitive due to the increase of beam splice fabrication cost and overall construction period. This paper now proposes the new weak-axis connection types without a scallop, which has more definite strength flow, simple connection details, and better workability. From the series of experiments, the proposed connections showed better strength and ductility in comparison with standard details with scallop because the thickness of the welding plate for wide-flanged, beam-to-column connection can be easily adjusted.
김필중,김상하 충남대학교 기초과학연구소 1996 忠南科學硏究誌 Vol.23 No.2
Good performance of the data link layer which is using sliding window protocol requires selection of optimal timeout duration. Timeout duration can be selected based on RTT. But, due to the variable environmental factors of channels, selection of optimal timeout duration is not easy task. This paper suggests additional method that can be used to identify frame loss even before timeout occurs. Using this additional method(called Fast Retransmission method), sender detects transmission error on a certain frame early and retransmits the frame immediately without further waiting for timeout event. This method loosen up the requirement of stringent timeout value on data link layer and gives the performance quite closed to the one that can be obtained with optimal timeout value.
반도체 메모리에 사용되는 전압발생기의 펌핑 커패시터 개선
김필중,구대성,윤중현,김종빈 조선대학교 전자정보통신연구소 2002 電子情報通信硏究所論文誌 Vol.5 No.1
In semiconductor memory, the kinds of voltage generator are high voltage generator, negative voltage generator, drain voltage generator and etc. The relevant circuits supported voltage generator, are clock generator, sense amplifier, voltage regulator and etc. The voltage generator consists of MOS diodes and MOS capacitors. To get the out voltage with sufficient charge, the MOS capacitors are big size. These MOS transistors can be adapted only on the EEPROM process. Thus, in this study, we designed stacked metal capacitor. This capacitor is small size bat can get capacitance. This capacitor is designed to comb type using metal-line and poly-line. The size of designed capacitor is 208×52 ㎛2 and the capacitance is about 4pF. The stacked metal capacitor can get much capacitance of 5~6 times than single plane capacitor. Also this capacitor will be easy adapted in sub-micro process technology of semiconductor memory. And this capacitor can be adapted on all memory process.
고집적 메모리의 yield 개선을 위한 전기적 구제회로
김필중,김종빈 한국전기전자재료학회 2000 전기전자재료학회논문지 Vol.13 No.4
Electrical repair method which has replaced laser repair method can replace defective cell by redundancy’s in the redundancy scheme of conventional high density memory. This electrical repair circuit consists of the antifuse program/read/latch circuits, a clock generator a negative voltage generator a power-up pulse circuit a special address mux and etc. The measured program voltage of made antifuses was 7.2~7.5V and the resistance of programmed antifuses was below 500 Ω. The period of clock generator was about 30 ns. The output voltage of a negative voltage generator was about 4.3 V and the current capacity was maximum 825 $mutextrm{A}$. An antifuse was programmed using by the electric potential difference between supply-voltage (3.3 V) and output voltage generator. The output pulse width of a power-up pulse circuit was 30 ns ~ 1$mutextrm{s}$ with the variation of power-up time. The programmed antifuse resistance required below 44 ㏀ from the simulation of antifuse program/read/latch circuit. Therefore the electrical repair circuit behaved safely and the yield of high densitymemory will be increased by using the circuit.