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Hybrid analytical modeling method for split power bus in multilayered package
Youchul Jeong,Lu, A.C.W.,Wai, L.L.,Wei Fan,Lok, B.K.,Hyunjeong Park,Joungho Kim IEEE 2006 IEEE transactions on electromagnetic compatibility Vol.48 No.1
<P>As multiple chips are being integrated into a single package with increased operating frequency, switching noise coupling on power buses has become an important design issue. To reduce the noise coupling, a split power bus structure has been generally used in package substrates having multilayered power and ground planes. Consequently, there is an increasing need for an efficient method to analyze a split power bus in a multilayered package. This paper introduces a hybrid analytical modeling method for characterizing a split power bus in a multilayered package. The proposed method uses a resonant cavity model combined with a segmentation method. Furthermore, a port assignment technique and an associated calculation method for the equivalent circuit model parameter of the split gap are proposed. The proposed port assignment technique and the analytical equation make it possible to analyze a split power bus, especially in a multilayered package. To verify the proposed method, multilayered test packages are fabricated and tested by means of frequency-domain measurements. In addition, an optimal power bus design method was successfully demonstrated for suppressing noise coupling between chips on a single package. Finally, the proposed method and optimal power bus design method was verified using a series of frequency-domain and time-domain measurements</P>
Youchul Jeong,Jaemin Kim,Joungho Kim IEEE 2006 IEEE microwave and wireless components letters Vol.16 No.1
<P>We propose a matrix substitution method for analyzing a power bus containing a power island in high-speed packages and printed circuit boards (PCBs). The method is based on a segmentation method and a resonant cavity model for a rectangular cavity, and the impedance of the power bus containing the power island can be calculated analytically. Finally, the proposed method is verified by means of impedance measurements in the frequency domain</P>
Modeling and measurement of simultaneous switching noise coupling through signal via transition
Jongbae Park,Hyungsoo Kim,Youchul Jeong,Jingook Kim,Jun So Pak,Dong Gun Kam,Joungho Kim Institute of Electrical and Electronics Engineers 2006 IEEE transactions on advanced packaging Vol.29 No.3
<P>The signal via is a heavily utilized interconnection structure in high-density System-on-Package (SoP) substrates and printed circuit boards (PCBs). Vias facilitate complicated routings in these multilayer structures. Significant simultaneous switching noise (SSN) coupling occurs through the signal via transition when the signal via suffers return current interruption caused by reference plane exchange. The coupled SSN decreases noise and timing margins of digital and analog circuits, resulting in reduction of achievable jitter performance, bit error ratio (BER), and system reliability. We introduce a modeling method to estimate SSN coupling based on a balanced transmission line matrix (TLM) method. The proposed modeling method is successfully verified by a series of time-domain and frequency-domain measurements of several via transition structures. First, it is clearly verified that SSN coupling causes considerable clock waveform distortion, increases jitter and noise, and reduces margins in pseudorandom bit sequence (PRBS) eye patterns. We also note that the major frequency spectrum component of the coupled noise is one of the plane pair resonance frequencies in the PCB power/ground pair. Furthermore, we demonstrate that the amount of SSN noise coupling is strongly dependent not only on the position of the signal via, but also on the layer configuration of the multilayer PCB. Finally, we have successfully proposed and confirmed a design methodology to minimize the SSN coupling based on an optimal via positioning approach</P>