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Sn-40Pb/Cu 및 Sn-3.0Ag-0.5Cu/Cu 접합부 계면반응 및 활성화에너지
김휘성,홍원식,박성훈,김광배,Kim, Whee-Sung,Hong, Won-Sik,Park, Sung-Hun,Kim, Kwang-Bae 한국재료학회 2007 한국재료학회지 Vol.17 No.8
In electronics manufacturing processes, soldering process has generally been used in surface mounting technology. Because of environmental restriction, lead free solders as like a SnAgCu ternary system are being used widely. After soldering process, the formation and growth of intermetalic compounds(IMCs) are formed in the interface between solder and Cu substrate as follows isothermal temperature and time. In this studies, therefore, we investigated the effects of the Cu substrate thickness on the IMC formation and growth of Sn-40Pb/Cu and Sn-3.0Ag-0.5Cu/Cu solder joints, respectively. The effect of the Cu thickness in PCB Cu pad and pure Cu plate was analyzed as measuring of thickness of each IMC. After solder was soldered on PCB and Cu plate which have different Cu thickness, we measured the IMC thickness in solder joints respectively. Also we compared with the effectiveness of Cu thickness on the IMC growth. From these results, we calculated the activation energy.
코발트실리사이드를 이용한 염료감응형 태양전지 상대전극의 신뢰성 평가
김광배(Kwangbae Kim),박태열(Taeyeul Park),송오성(Ohsung Song) 한국산학기술학회 2017 한국산학기술학회논문지 Vol.18 No.4
염료감응형 태양전지 촉매층으로 CoSi의 신뢰성을 확인하기 위해 전자빔증착기를 이용하여 100 ㎚-Co/300 ㎚-Si/quartz의 적층구조를 형성하고, 700℃-60분의 진공열처리하여 약 350 ㎚-CoSi를 형성하였다. 이때 잔류 Co를 제거하기 위해 80℃-30%의 황산처리를 진행하였다. 또한 비교를 위해 100 ㎚-Pt/glass 상대전극을 준비하였다. CoSi 상대전극이 채용된 DSSC 소자의 신뢰성을 확인하기 위해 80℃ 온도조건에서 0, 168, 336, 504, 672, 840시간동안 유지하였다. 이들을 채용한 DSSC 소자의 광전기적 특성을 분석하기 위해 solar simulator와 potentiostat을 이용하였다. CoSi 상대전극의 촉매활성도, 미세구조, 그리고 조성 분석을 확인하기 위해 CV, FE-SEM, FIB-SEM, EDS를 이용하여 분석하였다. 시간에 따른 에너지변환효율 결과, Pt와 CoSi 상대전극 모두 에너지변환효율이 504시간까지는 유지되다가 672시간 경과 후 처음의 50%로 감소하는 특성을 보였다. 촉매활성도 분석 결과, 시간이 지남에 따라 Pt와 CoSi 상대전극 모두 촉매활성도가 감소하여 각각 64%, 57%의 촉매활성도를 보였다. 미세구조 분석 결과, CoSi층은 전해질에 대한 안정성은 우수하였으나, 하부 쿼츠 기판과 CoSi층의 접촉면에 스트레스가 집중되어 국부적으로 크렉이 형성되며, 궁극적으로 ㎛급의 박리현상을 확인하였다. 따라서 CoSi 상대전극은 실리사이드화 되는 과정에서 잔류응력 때문에 열화가 일어나므로 신뢰성의 확보를 위해서는 이러한 잔류응력의 대책이 필요하였다. Cobalt silicide was used as a counter electrode in order to confirm its reliability in dye-sensitized solar cell (DSSC) devices. 100 ㎚-Co/300 ㎚-Si/quartz was formed by an evaporator and cobalt silicide was formed by vacuum heat treatment at 700℃ for 60 min to form approximately 350 ㎚-CoSi. This process was followed by etching in 80℃-30% H2SO4 to remove the cobalt residue on the cobalt silicide surface. Also, for the comparison against Pt, we prepared a 100 ㎚-Pt/glass counter electrode. Cobalt silicide was used for the counter electrode in order to confirm its reliability in DSSC devices and maintained for 0, 168, 336, 504, 672, and 840 hours at 80℃. The photovoltaic properties of the DSSCs employing cobalt silicide were confirmed by using a simulator and potentiostat. Cyclic-voltammetry, field emission scanning electron microscopy, focused ion beam scanning electron microscopy, and energy dispersive spectrometry analyses were used to confirm the catalytic activity, microstructure, and composition, respectively. The energy conversion efficiency (ECE) as a function of time and ECE of the DSSC with Pt and CoSi counter electrodes were maintained for 504 hours. However, after 672 hours, the ECEs decreased to a half of their initial values. The results of the catalytic activity analysis showed that the catalytic activities of the Pt and CoSi counter electrodes decreased to 64% and 57% of their initial values, respectively(after 840 hours). The microstructure analysis showed that the CoSi layer improved the durability in the electrolyte, but because the stress concentrates on the contact surface between the lower quartz substrate and the CoSi layer, cracks are formed locally and flaking occurs. Thus, deterioration occurs due to the residual stress built up during the silicidation of the CoSi counter electrode, so it is necessary to take measures against these residual stresses, in order to ensure the reliability of the electrode.
"FOLDING" 개념의 考察과 이를 適用시킨 남대문 시장 블록 計劃案
박길수(Park. kil-sue),김광배(Kim. kwang-bae) 대한건축학회 2004 대한건축학회 학술발표대회 논문집 - 계획계/구조계 Vol.24 No.1
The Purpose of this study is to consider what the concept of 'fold' in architecture is and to investigate how it is applied to architecture. 'Fold' is the concept that the philosopher, Gilles Delueze, had argued. Ever since the development of Physics and Maths, the concept, 'fold', has been broadly discussed. Rene Tom's' catastrophe theory' and topology help us understand the idea, "Folding". Especially it makes it possible to express complicated concept and visualization of modeling. 'Fold' in architecture accepts urban 'context' and has an influence on the shape of architecture. And by combining it with each heterogeneous element, a piece can be an entity as a whole, not divided element. so it can acquire a new 'placeness'. Neverthless it has not been long time since it was first discussed it. So only A few architects have materialized it. The concept of 'folding', which came out of the criticism of the previous Cartesian's view, will open a new possibility of architecture. So after the investigation into theoretical background of the 'fold' concept and analysis of examples which used the 'fold' concept in architecture, I propose a block design, whose application is based on the concept of 'folding'.
PECVD를 이용한 DLC 두께 제어에 따른 간섭색 구현
박새봄,김광배,김호준,김치환,최현우,송오성,Park, Saebom,Kim, Kwangbae,Kim, Hojun,Kim, Chihwan,Choi, Hyun Woo,Song, Ohsung 한국재료학회 2021 한국재료학회지 Vol.31 No.7
Various surface colors are predicted and implemented using the interference color generated by controlling the thickness of nano-level diamond like carbon (DLC) thin film. Samples having thicknesses of up to 385 nm and various interference colors are prepared using a single crystal silicon (100) substrate with changing processing times at low temperature by plasma-enhanced chemical vapor deposition. The thickness, surface roughness, color, phases, and anti-scratch performance under each condition are analyzed using a scanning electron microscope, colorimeter, micro-Raman device, and scratch tester. Coating with the same uniformity as the surface roughness of the substrate is possible over the entire experimental thickness range, and more than five different colors are implemented at this time. The color matched with the color predicted by the model, assuming only the reflection mode of the thin film. All the DLC thin films show constant D/G peak fraction without significant change, and have anti-scratch values of about 19 N. The results indicate the possibility that nano-level DLC thin films with various interference colors can be applied to exterior materials of actual mobile devices.
홍원식,김휘성,박성훈,김광배,Hong Won Sik,Kim Whee Sung,Park Sung Hun,Kim Kwang-Bae 한국재료학회 2005 한국재료학회지 Vol.15 No.8
It is inclined to increase that use of hazardous substances such as lead(Pb), mercury (Hg), cadmium(Cd) etc. are prohibited in the electronics according to environmental friendly policies of an advanced nation for protecting environment of earth. As this reasons, many researches for ensuring the reliability were proceeding in Pb free soldering process. n the flux remains on the PCB(printed circuit board) in the soldering process or the electronics exposed to corrosive environment, it becomes the reasons of breakdown or malfunction of the electronics caused by corrosion. Therefore in this studies we researched the polarization and Tafel properties of Sn40Pb and SnCu system solders based on the electrochemical theory. The experimental polarization curves were measured in distilled ionized water and 1 mole $3.5 wt\%$ NaCl electrolyte of $40^{\circ}C$, pH 7.5. Ag/AgCl and graphite were utilized by reference and counter electrodes, respectively. To observe the electrochemical reaction, polarization test was conducted from -250mV to +250mV. From the polarization curves composed of anodic and cathodic curves, we obtained Tafel slop, reversible electrode potential(Ecorr) and exchange current density((cow). In these results, we compared the corrosion rate of SnPb and SnCu solders.
Sn-40Pb/Cu 및 Sn-3.0Ag-0.5Cu/Cu 솔더 접합계면의 금속간화합물 형성에 필요한 활성화에너지
홍원식,김휘성,박노창,김광배,Hong, Won-Sik,Kim, Whee-Sung,Park, Noh-Chang,Kim, Kwang-Bae 대한용접접합학회 2007 대한용접·접합학회지 Vol.25 No.2
Sn-3.0Ag-0.5Cu lead fee solder was generally utilized in electronics assemblies. But it is insufficient to research about activation energy(Q) that is applying to evaluate the solder joint reliability of environmental friendly electronics assemblies. Therefore this study investigated Q values which are needed to IMC formation and growth of Sn-3.0Ag-0.5Cu/Cu and Sn-40pb/Cu solder joints during aging treatment. We bonded Sn-3.0Ag-0.5Cu and Sn-40Pb solders on FR-4 PCB with Cu pad$(t=80{\mu}m)$. After reflow soldering, to observe the IMC formation and growth of the solder joints, test specimens were aged at 70, 150 and $170^{\circ}C$ for 1, 2, 5, 20, 60, 240, 960, 15840, 28800 and 43200 min, respectively. SEM and EDS were utilized to analysis the IMCS. From these results, we measured the total IMC$(Cu_6Sn_5+Cu_3Sn)$ thickness of Sn-3.0Ag-0.5Cu/Cu and Sn-40Pb/Cu interface, and then obtained Q values for the IMC$(Cu_6Sn_5,\;Cu_3Sn)$ growth of the solder joints.