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개선된 ARM 7 코어와 peripheral 내장 프로세서 설계
조현우(Hyun-Woo Cho),허경철(Kyung-Chol Huh),송승원(Seung-Won Song),조군식(Koon-Shik Cho),최원태(Won-Tae Choi),김태훈(Tae-Hoon Kim),박주성(Ju-Sung Park) 대한전자공학회 2007 대한전자공학회 학술대회 Vol.2007 No.7
This paper deals with design of RISC processor, which is compatible with ARM7 and has some improvement. We designed a pipeline for the processor based on a p flip-flop, which solved the problem with the latch-based pipeline. Also, by modifying the structure of multiplier of the ARM7 core, we attempted to improve the performance of core. Additionally, the design includes AMBA BUS, audio codec interface, MMU, and built-in RAM of 192kbyte. The designed processor is fabricated with 0.18㎛ CMOS process. It is confirmed that the chip is compatible with the ARM7 through unit instruction test, combinational test of instructions, and running applications. It is also confirmed that the designed 32bit RISC processor has less calculation cycles in all applications than ARM7.