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Jae-Won Choi,Soo-Yeun Han,Manh-Cuong Nguyen,An Hoang-Thuy Nguyen,Jung Yeon Kim,Sujin Choi,Jonggyu Cheon,Hyungmin Ji,Rino Choi IEEE 2017 IEEE electron device letters Vol.38 No.9
<P>This letter reports the low-temperature solution-based fabrication of indium oxide (In2O3) thin-film transistors (TFTs) using a visible laser-assisted urea combustion process. An In2O3 precursor solution containing a small amount of urea absorbed the photon energy from a blue laser and started the combustion of urea to form a crystallized In2O3 phase. Atomic force microscopy and X-ray diffraction showed that both laser radiation and urea combustion together are necessary to convert a dried precursor solution layer to a crystallized In2O3 phase. A TFT fabricated from the 0.2-mol% urea-added solution and laser annealed with a 250-J/cm(2) energy fluence exhibited superior transfer characteristics compared with the TFTs fabricated either without urea addition or with small energy fluence radiation. Based on these results and considering the price of blue laser diodes, this technique can be an economical solution for the fabrication of oxide semiconductor TFTs on flexible substrates with a low melting point.</P>
Hokyung Park,Rino Choi,Byoung Hun Lee,Seung-Chul Song,Man Chang,Young, C.D.,Bersuker, G.,Lee, J.C.,Hyunsang Hwang IEEE 2006 IEEE electron device letters Vol.27 No.8
<P>To understand the intrinsic effect of a hot-carrier injection on high-kappa dielectrics free from concurrent cold-carrier trapping, the authors have investigated a hot-carrier-induced damage with channel hot-carrier stresses and substrate hot-carrier stress. Compared to substrate hot-carrier stress, the channel hot-carrier stress shows a more significant cold-carrier-injection effect. By using a detrapping bias, they were able to decouple the effect of cold-carrier trapping from the permanent trap generation induced by the hot-carrier injection. As channel hot-carrier stress bias was reduced, a portion of cold-carrier trapping increased and a portion of interface trap generation decreased</P>
Azmi, Azida,Lee, Jiwon,Gim, Tae Jung,Choi, Rino,Jeong, Jae Kyeong IEEE 2017 IEEE electron device letters Vol.38 No.11
<P>This letter reports the fabrication of p-channel tin monoxide (SnO) thin-film transistors (TFTs) with a highpermittivity zirconiumoxide (ZrO2) gate insulatorfilm, which were prepared by a low-cost spin-cast method. The spincast ZrO2 dielectrics exhibit a low leakage current density of 4.5x10(-8) A/cm(2) at 1 MV/cm. Introducing the ZrO2 dielectric in top-typeSnOTFTs allows for a reduction in the driving gate voltage range from 80 to 10 V, ascomparedwith devices with a thermal SiO2 gate insulator. Additionally, a high fieldeffect mobility of 2.5 cm(2)/Vs and an ION/OFF of 3 x10(3) were preserved.</P>
Chadwin D. Young,Dawei Heh,Rino Choi,Byoung Hun Lee,Gennadi Bersuker 대한전자공학회 2010 Journal of semiconductor technology and science Vol.10 No.2
Pulsed current-voltage (I-V) methods are introduced to evaluate the impact of fast transient charge trapping on the performance of high-κ dielectric transistors. Several pulsed I-V measurement configurations and measurement requirements are critically reviewed. Properly configured pulsed I-V measurements are shown to be capable of extracting such device characteristics as trap-free mobility, trapinduced threshold voltage shift (△Vt), as well as effective fast transient trap density. The results demonstrate that the pulsed I-V measurements are an essential technique for evaluating high-κ gate dielectric devices.
Song, Ji Hun,Kim, Kwang Suk,Mo, Yeon Gon,Choi, Rino,Jeong, Jae Kyeong IEEE 2014 IEEE electron device letters Vol.35 No.8
<P>Bottom gate and etch stopper-type thin-film transistors (TFTs) with a channel layer of indium–zinc–tin oxide were fabricated. The resulting TFTs exhibited a high mobility exceeding 52 cm<inline-formula> <TEX-math notation='TeX'>\(^{2}\) </tex-math></inline-formula>/Vs, a low subthreshold gate swing of 0.2 V/decade, a threshold voltage of 0.1 V, and an <inline-formula> <TEX-math notation='TeX'>\(I_{\mathrm{\scriptstyle ON}/\mathrm{\scriptstyle OFF}}\) </tex-math></inline-formula> ratio of <inline-formula> <TEX-math notation='TeX'>\(> 2\times 10^{8}\) </tex-math></inline-formula>. The stability of the oxide passivated device under the positive and negative bias stress conditions was superior to that of the nitride passivated device, which can be attributed to the lower trap density in the channel layer.</P>
Minseok Jo,Man Chang,Seonghyun Kim,Hyung-Suk Jung,Rino Choi,Hyunsang Hwang IEEE 2009 IEEE electron device letters Vol.30 No.3
<P>Negative bias temperature instability (NBTI) in MOSFETs with high-dielectric-constant (<I>k</I>) gate dielectrics has been investigated using a novel pulse NBTI measurement technique. This technique enabled the separation of the contribution of interface states (<I>N</I> <SUB>it</SUB>) from that of oxide traps (<I>N</I> <SUB>ot</SUB>) to NBTI behavior by varying the measurement time (<I>t</I> <SUB>m</SUB>) and the delay time (<I>t</I> <SUB>R</SUB>). The technique was demonstrated on devices fabricated with different postdeposition annealing (PDA) conditions. It was found that, regardless of the PDA condition, the <I>N</I> <SUB>ot</SUB> in high-<I>k</I> dielectric was more responsible for the NBTI behavior than the <I>N</I> <SUB>it</SUB>, but the contribution of <I>N</I> <SUB>it</SUB> to NBTI increased as the stress continued because the generation rate of <I>N</I> <SUB>it</SUB> was higher than that of <I>N</I> <SUB>ot</SUB>.</P>