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다중 안테나 통신 시스템을 위한 효율적인 심볼 검출기 설계 연구
장수현(Soohyun Jang),한철희(Chulhee Han),최성남(Sungnam Choi),곽재섭(Jaeseop Kwak),정윤호(Yunho Jung) 大韓電子工學會 2010 電子工學會論文誌-SD (Semiconductor and devices) Vol.47 No.3
본 논문에서는 2개의 송수신 안테나를 갖는 MIMO 통신 시스템을 위한 면적 효율적인 심볼 검출기의 구조를 제안한다. 제안된 심볼 검출기는 MIMO 전송 기법 중 공간 다이버시티 모드뿐 아니라 공간 다중화 모드를 모두 지원하며, ML 수준의 성능을 제공한다. 또한, 다단 (multi-stage) 파이프라인 구조와 극좌표 형태의 복소수 승산 방법을 사용하여 연산 블록의 공유와 연산기의 단순화를 진행하였고, 이를 통해 하드웨어 복잡도를 크게 감소시켰다. 제안된 하드웨어 구조는 하드웨어 설계 언어(HDL)를 이용하여 설계 되었고, Xilinx Virtex-5 XC5VLX220 FPGA에 기반하여 구현되었다. 그 결과 기존의 설계 구조와 비교시 35.3% 감소된 logic slices, 85.3% 감소된 DSP48s (dedicated multiplier)로 구현 가능함을 확인하였다. In this paper, an area-efficient symbol detector is proposed for MIMO communication systems with two transmit and two receive antennas. The proposed symbol detector can support both the spatial multiplexing mode and spatial diversity mode for MIMO transmission technique, and shows the optimal maximum likelihood (ML) performance. Also, by sharing the hardware block with multi-stage pipeline structure and using the complex multiplier based on polar-coordinate, the complexity of the proposed architecture is dramatically decreased. The proposed symbol detector was designed in hardware description language (HDL) and implemented with Xilinx Virtex-5 FPGA. With the proposed architecture, the number of logic slices for the proposed symbol detection is 52490 and the number of DSP48s (dedicated multiplier) is 52, which are reduced by 35.3% and 85.3%, respectively, compared with the conventional architecture.
전통한복 전문 카탈로그를 통해 본 2010년 이후 장식기법의 유형
장수현 ( Soohyun Jang ),이은진 ( Eujin Lee ) 복식문화학회 2021 服飾文化硏究 Vol.29 No.2
The purpose of this study is to classify the types of decoration techniques used in women’s Chima and Jeogori in traditional Hanbok catalogs from 2010 to 2020, and to analyze the frequency of each type. The method of this study is as follows. This study first investigated the transition of modern Hanbok and decorative techniques by analyzing and classifying such work in previous studies. Based on this, the technique of decorating the Jeogori and Chima that appeared in the traditional Hanbok catalog of the study period was analyzed. The results of the study are as follows. In the case of Jeogori, in the first half of 2010, the decorative technique of a relatively large size was used, and the decorativeness tended to be strong. However, in the late 2010s, the number of decorative techniques used in Jeogori has decreased, and the size of the decorative technique has become smaller and more concise, leading to a tendency to understated decoration. In the case of Chima, techniques to express natural texture by processing threads or fabrics themselves were mainly used rather than techniques to add decoration to the surface, and techniques to express various surface texture tended to develop toward the late 2010s. The change in the decoration technique of Jeogori and Chima appears to be a combination of social, cultural, and economic factors such as a change in consumption culture and a reduction in the wedding market.
MIMO 통신 시스템을 위한 저복잡도 Configurable 심볼 검출기 설계
장수현(Soohyun Jang),정윤호(Yunho Jung) 제어로봇시스템학회 2011 제어로봇시스템학회 합동학술대회 논문집 Vol.1 No.2
In this paper, an efficient configurable multiple-input-output(MIMO) symbol detector is proposed for MIMO communication systems with four transmit and four receive antennas. The proposed symbol detector can support both the spatial multiplexing mode and spatial diversity bode for MIMO transmission technique. Especially. in order to reduce the complexity of MIMO symbol detector supporting 4x4 DSTTD and 4x4 SM modes which require very high complexity, the efficient decoding scheme based on 2x4 MIMO decoder core and channel preprocessor module is proposed. the proposed symbol detector was designed in hardware description language (HDL) and synthesized to gate-level circuits using 0.13um CMOS standard cell library. The total logic gates of the proposed MIMO symbol detector are 1.23K with an 80-Mhz clock frequency, which reduces the logic gates by 59% compared to the conventional symbol detector employing individual detectors for each MIMO mode.
디지털 방송 시스템을 위한 효율적인 LDPC 복호기 설계
장수현(Soohyun Jang),서정욱(Jeongwook Seo),김현식(Hyunsik Kim),이연성(Yeonsung Lee),정윤호(Yunho Jung) 한국방송·미디어공학회 2011 한국방송공학회 학술발표대회 논문집 Vol.2011 No.11
In this paper, an area-efficient architecture of LDPC Decoder is proposed for DVB (Digital Video Broadcasting) 2.0 systems. The proposed LDPC Decoder was designed in hardware description language (HDL) and implemented with Xilinx Virtex-5 FPGA. With the proposed architecture, the number of slices for the decoder is 56122 and the number of block RAM is 135.
자율주행차량을 위한 차세대 내부 네트워크의 보안 및 초고속 무결성 부여 기술 개발
신대교(DaeKyo Shin),장수현(SooHyun Jang),윤상훈(SangHun Yoon),임기택(Kiteag Lim) 대한전자공학회 2021 대한전자공학회 학술대회 Vol.2021 No.6
As the development of driving services for autonomous vehicles progresses, it is necessary to provide services that require reliability and safety such as remote control, platooning, sensor information transmission(see-through service), and driving negotiation. In order to provide such a serv/[ice, it is necessary to secure the reliability of the data provided by the vehicle. For this purpose, this paper describes the core technologies of secure communication for countering intrusion attacks on in-vehicle network intrusion and for low latency communication in multi In-Vehicle networks, high-speed interworking, data integrity, and real-time V2X interworking.