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Ultra-wideband power divider using three parallel-coupled lines and one shunt stub
Dang, Trung-Sinh,Kim, Chang-Woo,Yoon, Sang-Woong IET 2014 Electronics letters Vol.50 No.2
<P>An ultra-wideband power divider with out-of-band filtering and DC blocking functions is presented. The divider consists of three parallel-coupled lines, a short-circuited shunt stub and a resistor. The divider was implemented in a two-layer printed circuit board with a high dielectric constant. The measurements show a minimum insertion loss of -0.4 dB in the middle band and a rejection of -17 to -18 dBc at 1.5 and 11.5 GHz, respectively.</P>
Trung-Sinh Dang,Anh-Dung Tran,이범선,윤상웅 한국전자통신연구원 2013 ETRI Journal Vol.35 No.3
This letter presents a power amplifier (PA) with an on-chip power detector for 2.4-GHz wireless local area network application. The power detector consists of a clamp circuit, a diode detector, and a coupled line directional coupler. A series inductor for an output matching network in the PA is combined with a through line of the coupler, which reduces the coupling level. Therefore, the coupler employs a metamaterial-based transformer configuration to increase coupling. The amount of coupling is increased by 2.5 dB in the 1:1 symmetric transformer structure and by 4.5 dB from two metamaterial units along the coupled line.
A Broadband On-chip Power Divider up to W-band with Three-dimensional Three-coupled Lines
Trung-Sinh Dang,Nhut-Tan Doan,Byung-Sung Kim,Nam-Yoon Kim,Chang-Woo Kim,Sang-Woong Yoon 대한전자공학회 2018 Journal of semiconductor technology and science Vol.18 No.1
A state-of-the-art broadband on-chip power divider in millimeter-wave up to 103 GHz is presented. The power divider employs novel three-dimensional (3-D) three-coupled lines to achieve the desired mode impedances for an extremely wideband characteristic. The power divider was implemented in TSMC 180 nm RF CMOS IC technology with six metal layers. Measurements show the absolute bandwidth from 11 to 103 GHz with matching conditions of all of the ports and isolation between two outputs of less than -10 dB. The fractional bandwidth is 161.4%. The insertion loss is between 1.2 and 7.9 dB across the overall bandwidth. The core size of the power divider is 0.18 mm × 0.68 mm.
Sang-Woong Yoon,Trung-Sinh Dang,Ngoc-Duy-Hien Lai,Park, Jae Y. IEEE 2015 IEEE transactions on components, packaging, and ma Vol.5 No.7
<P>This paper presents a power amplifier module (PAM) that operates efficiently in low-power mode for IEEE 802.11g Wi-Fi applications. The PAM consists of a power amplifier (PA), a buck converter, and a power detector. Two packaging technologies were used to integrate the compact module: a low-temperature co-fired ceramic (LTCC) technology and a ferrite-filled printed circuit board (PCB) technology. The LTCC portion includes radio-frequency inductors, capacitors, transmission lines, and interconnection lines to minimize the overall size, while a power inductor for the buck converter is implemented in ferrite-filled PCB. The PA and the buck converter are designed in 2-μm InGaP/GaAs heterojunction bipolar transistor technology and 0.35-μm CMOS technology, respectively. The output power level is converted into a voltage by the power detector, and the voltage controls the buck converter, thereby optimizing the supply voltage of the PA. This adaptive supply voltage helps to improve the power-added efficiency (PAE) in the low-power regime while maintaining linearity. The PAM showed an error vector magnitude of less than 4% up to an output power of 22 dBm. The PAE is 8% and 11% at output powers of 11 and 16 dBm, respectively, representing respective improvements of 60% and 43%. The overall size of the PAM is 5×7.5×1.2 mm<SUP>3</SUP>.</P>