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A Novel Process for Fabricating a High Density Trench MOSFETs for DC-DC Converters
JongdaeKim,박일용,이대우,TaeMoonRoh,Sang-GiKim,YilSukYang,Jin-GunKoo,,YoungIlKang 한국전자통신연구원 2002 ETRI Journal Vol.24 No.5
We propose a new process technique for fabricating very high-density trench MOSFETs using 3 mask layers with oxide spacers and a self-aligned technique. This technique reduces the device size in trench width, source, and p-body region with a resulting increase in cell density and current driving capability as well as cost-effective production capability. We were able to obtain a higher breakdown voltage with uniform oxide grown along the trench surface. The channel density of the trench DMOSFET with a cell pitch of 2.3–2.4 μm was 100 Mcell/in2 and a specific onresistance of 0.41 mΩ⋅cm2 was obtained under a blocking voltage of 43 V.
A Serial Input/Output Circuit with 8 bit and 16 bit Selection Modes
YilSukYang,이대우,박일용,유병곤,JongdaeKim,TaeMoonRoh,JinGunKoo,Sang-GiKim 한국전자통신연구원 2002 ETRI Journal Vol.24 No.6
This paper presents a serial interface circuitthat permits selection of the amount of data converted from serial-to-parallel and parallel-to-serial and overcomes the disadvantages of the conventional serial input/output interface. Based on the selected data length operating mode, 8 bit or 16 bit serial-to-parallel and 8 bit or 16 bit parallel-to-serial conversion takes place in data blocks of the selected data length.