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TaeMoonRoh,이대우,YilSukYang,JinGunKoo,JongdaeKim 한국전자통신연구원 2002 ETRI Journal Vol.24 No.4
We investigated the electrical characteristics of p-channel double-diffused MOSFETs (p-LDMOSFETs) with an uneven racetrack source (URS) and a conventional racetrack source (CRS) for PDP driver IC applications. The breakdown voltage of the p-LDMOSFET with the URS in offstate was nearly the same as the p-LDMOSFET with the CRS. However, the breakdown voltage of the p-LDMOSFET with the URS in on-state was about 30% higher than that of the p- LDMOSFET with the CRS, while the saturated drain current of the p-LDMOSFET with the URS was only about 4% lower than that of the p-LDMOSFET with the CRS.
A Fully Integrated Thin-Film Inductor and Its Application to a DC-DC Converter
박일용,이대우,SangGiKim,JinGunKoo,TaeMoonRoh,YilSukYang,JongdaeKim 한국전자통신연구원 2003 ETRI Journal Vol.25 No.4
This paper presents a simple process to integrate thin-film inductors with a bottom NiFe magnetic core. NiFe thin films with a thickness of 2 to 3 μm were deposited by sputtering. A polyimide buffer layer and shadow mask were used to relax the stress of the NiFe films. The fabricated double spiral thin-film inductor showed an inductance of 0.49 μH and a Q factor of 4.8 at 8 MHz. The DC-DC converter with the monolithically integrated thin-film inductor showed comparable performances to those with sandwiched magnetic layers. We simplified the integration process by eliminating the planarization process for the top magnetic core. The efficiency of the DC-DC converter with the monolithic thin-film inductor was 72% when the input voltage and output voltage were 3.5 V and 6 V, respectively, at an operating frequency of 8 MHz.
A Novel Process for Fabricating a High Density Trench MOSFETs for DC-DC Converters
JongdaeKim,박일용,이대우,TaeMoonRoh,Sang-GiKim,YilSukYang,Jin-GunKoo,,YoungIlKang 한국전자통신연구원 2002 ETRI Journal Vol.24 No.5
We propose a new process technique for fabricating very high-density trench MOSFETs using 3 mask layers with oxide spacers and a self-aligned technique. This technique reduces the device size in trench width, source, and p-body region with a resulting increase in cell density and current driving capability as well as cost-effective production capability. We were able to obtain a higher breakdown voltage with uniform oxide grown along the trench surface. The channel density of the trench DMOSFET with a cell pitch of 2.3–2.4 μm was 100 Mcell/in2 and a specific onresistance of 0.41 mΩ⋅cm2 was obtained under a blocking voltage of 43 V.
A Serial Input/Output Circuit with 8 bit and 16 bit Selection Modes
YilSukYang,이대우,박일용,유병곤,JongdaeKim,TaeMoonRoh,JinGunKoo,Sang-GiKim 한국전자통신연구원 2002 ETRI Journal Vol.24 No.6
This paper presents a serial interface circuitthat permits selection of the amount of data converted from serial-to-parallel and parallel-to-serial and overcomes the disadvantages of the conventional serial input/output interface. Based on the selected data length operating mode, 8 bit or 16 bit serial-to-parallel and 8 bit or 16 bit parallel-to-serial conversion takes place in data blocks of the selected data length.