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RISS 인기검색어
- 검색키워드
- 저자 : Furong Xiao (검색결과 6 건)
- 무료
- 기관 내 무료
- 유료
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A Smooth LVRT Control Strategy for Single-Phase Two-Stage Grid-Connected PV Inverters
Xiao, Furong,Dong, Lei,Khahro, Shahnawaz Farhan,Huang, Xiaojiang,Liao, Xiaozhong The Korean Institute of Power Electronics 2015 JOURNAL OF POWER ELECTRONICS Vol.15 No.3
Based on the inherent relationship between dc-bus voltage and grid feeding active power, two dc-bus voltage regulators with different references are adopted for a grid-connected PV inverter operating in both normal grid voltage mode and low grid voltage mode. In the proposed scheme, an additional dc-bus voltage regulator paralleled with maximum power point tracking controller is used to guarantee the reliability of the low voltage ride-through (LVRT) of the inverter. Unlike conventional LVRT strategies, the proposed strategy does not require detecting grid voltage sag fault in terms of realizing LVRT. Moreover, the developed method does not have switching operations. The proposed technique can also enhance the stability of a power system in case of varying environmental conditions during a low grid voltage period. The operation principle of the presented LVRT control strategy is presented in detail, together with the design guidelines for the key parameters. Finally, a 3 kW prototype is built to validate the feasibility of the proposed LVRT strategy.
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A Smooth LVRT Control Strategy for Single-Phase Two-Stage Grid-Connected PV Inverters
Furong Xiao,Lei Dong,Shahnawaz Farhan Khahro,Xiaojiang Huang,Xiaozhong Liao 전력전자학회 2015 JOURNAL OF POWER ELECTRONICS Vol.15 No.3
Based on the inherent relationship between dc-bus voltage and grid feeding active power, two dc-bus voltage regulators with different references are adopted for a grid-connected PV inverter operating in both normal grid voltage mode and low grid voltage mode. In the proposed scheme, an additional dc-bus voltage regulator paralleled with maximum power point tracking controller is used to guarantee the reliability of the low voltage ride-through (LVRT) of the inverter. Unlike conventional LVRT strategies, the proposed strategy does not require detecting grid voltage sag fault in terms of realizing LVRT. Moreover, the developed method does not have switching operations. The proposed technique can also enhance the stability of a power system in case of varying environmental conditions during a low grid voltage period. The operation principle of the presented LVRT control strategy is presented in detail, together with the design guidelines for the key parameters. Finally, a 3 kW prototype is built to validate the feasibility of the proposed LVRT strategy.
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A New Orthogonal Signal Generator with DC Offset Rejection for Single-Phase Phase Locked Loops
Huang, Xiaojiang,Dong, Lei,Xiao, Furong,Liao, Xiaozhong The Korean Institute of Power Electronics 2016 JOURNAL OF POWER ELECTRONICS Vol.16 No.1
This paper presents a new orthogonal signals generator (OSG) with DC Offset rejection for implementing a phase locked loop (PLL) in single-phase grid-connected power systems. An adaptive filter (AF) based on the least mean square (LMS) algorithm is used to constitute the OSG in this study. The DC offset in the measured grid voltage signal can be significantly rejected in the developed OSG technique. This generates two pure orthogonal signals that are free from the DC offset. As a result, the DC offset rejection performance of the presented single-phase phase locked loop (SPLL) can be enhanced. A mathematical model of the developed OSG and the principle of the adaptive filter based SPLL (AF-SPLL) are presented in detail. Finally, simulation and experimental results demonstrate the feasibility of the proposed AF-SPLL.
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A New Orthogonal Signal Generator with DC Offset Rejection for Single-Phase Phase Locked Loops
Xiaojiang Huang,Lei Dong,Furong Xiao,Xiaozhong Liao 전력전자학회 2016 JOURNAL OF POWER ELECTRONICS Vol.16 No.1
This paper presents a new orthogonal signals generator (OSG) with DC Offset rejection for implementing a phase locked loop (PLL) in single-phase grid-connected power systems. An adaptive filter (AF) based on the least mean square (LMS) algorithm is used to constitute the OSG in this study. The DC offset in the measured grid voltage signal can be significantly rejected in the developed OSG technique. This generates two pure orthogonal signals that are free from the DC offset. As a result, the DC offset rejection performance of the presented single-phase phase locked loop (SPLL) can be enhanced. A mathematical model of the developed OSG and the principle of the adaptive filter based SPLL (AF-SPLL) are presented in detail. Finally, simulation and experimental results demonstrate the feasibility of the proposed AF-SPLL.
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Design of Active Disturbance Rejection Control for Inductive Power Transfer Systems
Yanan Wang,Lei Dong,Xiaozhong Liao,Xinglong Ju,Furong Xiao 전력전자학회 2018 JOURNAL OF POWER ELECTRONICS Vol.18 No.5
The control design of inductive power transfer (IPT) systems has attracted a lot of attention in the field of wireless power transmission. Due to the high-order resonant networks and multiple loads in IPT systems, a simplified model of an IPT system is preferred for analysis and control design, and a controller with strong robustness is required. Hence, an active disturbance rejection control (ADRC) for IPT systems is proposed in this paper. To realize the employment of ADRC, firstly a small-signal model of an LC series-compensative IPT system is derived based on generalized state-space averaging (GSSA), then the ADRC is implemented in the designed IPT system. The ADRC not only provides superior robustness to unknown internal and external disturbances, but also requires few knowledge of the IPT system. Due to the convenient realization of ADRC, the designed IPT system retains its simple structure without any additional circuits. Finally, a frequency domain analysis and experimental results have validated the effectiveness of the employed ADRC, especially its robustness in the presence of frequency drifts and other common disturbances.
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Design of Active Disturbance Rejection Control for Inductive Power Transfer Systems
Wang, Yanan,Dong, Lei,Liao, Xiaozhong,Ju, Xinglong,Xiao, Furong The Korean Institute of Power Electronics 2018 JOURNAL OF POWER ELECTRONICS Vol.18 No.5
The control design of inductive power transfer (IPT) systems has attracted a lot of attention in the field of wireless power transmission. Due to the high-order resonant networks and multiple loads in IPT systems, a simplified model of an IPT system is preferred for analysis and control design, and a controller with strong robustness is required. Hence, an active disturbance rejection control (ADRC) for IPT systems is proposed in this paper. To realize the employment of ADRC, firstly a small-signal model of an LC series-compensative IPT system is derived based on generalized state-space averaging (GSSA), then the ADRC is implemented in the designed IPT system. The ADRC not only provides superior robustness to unknown internal and external disturbances, but also requires few knowledge of the IPT system. Due to the convenient realization of ADRC, the designed IPT system retains its simple structure without any additional circuits. Finally, a frequency domain analysis and experimental results have validated the effectiveness of the employed ADRC, especially its robustness in the presence of frequency drifts and other common disturbances.
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