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An NIC Voltage Divider for a Linear Transconductor
Fujihiko Matsumoto,Takeshi Sonoda,Toshio Miyazawa,Shintaro Nakamura,Yasuaki Noguchi 대한전자공학회 2008 ITC-CSCC :International Technical Conference on Ci Vol.2008 No.7
A local feedback linear transconductor requires a voltage divider. For realization of a gyrator-C filter, an output terminal of a transconductor in the filter is connected to an input terminal of itself or another transconductor owing to local feedback of gyrators and equivalent resistors. If NIC circuits are employed in a gyrator-C filter, the voltage divider and the NIC are connected in parallel. This paper proposes a NIC divider that has two roles: one is a voltage divider and the other is an NIC for improvement of the output resistance of a transconductor.
A Level Shifter for a Bias-Offset Transconductor
Fujihiko Matsumoto,Toshio Miyazawa,Shintaro Nakamura,Yasuaki Noguchi 대한전자공학회 2008 ITC-CSCC :International Technical Conference on Ci Vol.2008 No.7
A transconductor is a fundamental building block for analog signal processing circuits, such as filters and multipliers. For such applications, the transfer characteristic of the transconductor is desired to be linear. The bias-offset transconductor is known as a linear MOS transconductor. The transconductor has floating voltage sources. This paper presents a new design of the floating voltage source. If the proposed circuit is used as a level shifter for the linear transconductor, the output DC voltage is more accurate than that of the conventional circuit. Further, the proposed circuit is used as the second signal voltage source for a multiplier, the second harmonic distortion is improved. Simulation results show those advantages.
A Symmetrical Floating Impedance Scaling Circuit with Improved Low-frequency Characteristics
Fujihiko MATSUMOTO,Syuzo NISHIOKA,Shota MATSUO,Takeshi OHBUCHI 대한전자공학회 2017 IEIE Transactions on Smart Processing & Computing Vol.6 No.6
Impedance scaling techniques are known as methods to realize large capacitance with a small capacitor. Recently, a symmetrical floating impedance scaling (SFIS) circuit was proposed. However, the circuit has restrictions on operations at a lower frequency. In this paper, improvement techniques for low-frequency characteristics of the SFIS circuit are proposed. In order to enhance the terminal resistance, a negative impedance converter (NIC) block is employed in the SFIS circuit. In addition, cascode transistors are introduced to enhance the internal resistance associated with a capacitor in the SFIS circuit. The proposed techniques make the pole frequency lower. The proposed SFIS circuit is applied to a third-order Chebyshev filter via simulation. Cutoff frequency fc of the filter is set to 100 Hz, and the passband ripple of the filter is set to 0.5 dB. Simulation results show that the filter employing the proposed SFIS circuit is superior to a conventional one.