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        A Scaled SONOS Single-Transistor Memory Cell for a High-Density NOR Structure with Common Source Lines

        ByungcheulKim,Sang-BaeYi,Kwang-YellSeo 한국물리학회 2002 THE JOURNAL OF THE KOREAN PHYSICAL SOCIETY Vol.41 No.6

        A scaled polysilicon-oxide-nitride-oxide-silicon (SONOS) single-transistor memory cell in a NOR structure with common source lines is proposed for high density, and its operating conditions are demonstrated. The cell area of the SONOS single-transistor memory realized by using 0.35-$\mu$m complementary metal-oxide-semiconductor (CMOS) technology is 1.32 $\mu$m$^2$. A selected cell is programmed by applying 3 V to the gate and $-$5.5 V to the source, drain, and substrate, and is erased by applying $-$5.5 V to the gate and 3 V to the source, drain, and substrate. Drain disturbance is inhibited by applying $-$5.5 V to the gate of an unselected cell sharing the bit-line. Gate program-inhibit is achieved only within the limit of 50 ms of programming time at pre-cycle by applying 0 V to the drain of an unselected cell sharing the word-line. These make it possible to operate from 3-V single power supply.

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        Single Power Supply Operated and Highly Reliable SONOS EEPROMs

        ByungcheulKim,Sang-EunLee,Kwang-YellSeoy 한국물리학회 2002 THE JOURNAL OF THE KOREAN PHYSICAL SOCIETY Vol.40 No.4

        Two kinds of polysilicon-oxide-nitride-oxide-silicon (SONOS) transistors were fabricated, whose nitride thicknesses were 40 A and 70 A, to investigate the scaling eects. The blocking oxide and the tunnel oxide were 25 A and 24 A, respectively, for both devices. The SONOS device with the 40-A nitride layer had a larger memory window and a lower decay rate of programmed charges than the device with a 70-A nitride layer, that means that, for a scaled device, the electrons injected in the nitride layer fill the blocking oxide-nitride interface, as well as the nitride layer, while the injected electrons for the device with a nitride thickness of 70 A ll part of the nitride bulk. A new programming method, a source/drain program and a channel erase, to operate with only a single power supply of 3 V and to realize high reliability has been proposed. After 1106 program/erase cycles, the interface trap density of the channel region showed only a small increase from the initial density of 8.731010 cm2 to 1.621011/cm2 for the proposed programming method.

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