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이재경,지동해,창병모,Lee, J.K.,Chi, D.,Chang, B.-M. 한국전자통신연구원 1994 전자통신동향분석 Vol.9 No.4
Wide variety of the architectural complexity of parallel computer often makes it difficult to develop efficient programs for them. One of approaches to improve this difficulty is to program in familiar sequential languages such as Fortran or C and to parallelize sequential programs into equivalent parallel programs automatically. This paper presents an organization of parallelizing compiler which transforms sequential programs into equivalent parallel programs. The parallelizer consists mainly of syntax analysis, control and data flow analysis, program transformation, and parallel code generation. In particular, the program restructuring in this parallelizer maximizes loop parallelism.
PLC를 이용한 공작기계의 설비정보 획득 및 신호분석에 관한 연구
황경환(K.H. Hwang),곽용길(Y.K. Kwak),박종권(J.K. Park),이승우(S.Y. Lee),이재경(J.K. Lee),남소정(S.J. Nam),안중환(J.H. Ahn) 한국생산제조학회 2011 한국생산제조시스템학회 학술발표대회 논문집 Vol.2011 No.4
A PLC was been using widely in automation equipment. And HMI system is necessary system for control and monitoring for PLC. The main objective of this paper is to propose a research on machine tool data acquisition and analysis signals using PLC. In this paper, machine tool states are acquired by two stage. Fist, the output signal of equipment is saved internal memory by rising edge detection. And the data is transferred for PC by SND Function. Second, the HMI system decision the status of machine tool by signals of Door, Chuck, Power, Lamp etc. To evaluate developed HMI system, through driving CNC lathe the real operation statas of CNC-lathe are compared to monitoring system.
MB-OFDM UWB 시스템을 위한 주파수 합성기의 유형별 설계 및 비교
이재경(J. K. Lee),정태현(T. H. Cheong),박종태(J. T. Park),유종근(C. G. Yu) 대한전기학회 2006 대한전기학회 학술대회 논문집 Vol.2006 No.10
This paper describes fast-hopping frequency synthesizers for multi-band OFDM(MB-OFDM) ultra-wide band(UWB) systems. Three different structures in generating 3 center frequencies(3432㎒, 3960㎒. 4488㎒) are designed and compared. The first structure generates 3 center frequencies using only one PLL operating at 4224㎒. The second uses three PLLs operating at corresponding center frequencies. The third employes two PLLs operating at 3960㎒ and 528㎒. Simulation results using a 0.18㎛ RF CMOS process parameters show that the third structure exhibit the best characteristics. The band switching time of the proposed synthesizer is less than 1.3㎱ and the spur is less than -36㏈c. The synthesizer consumes 22㎃ from a 1.8V supply.