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고속 스위칭 동작의 주파수 합성기를 위한 하이브리드형 구조 설계와 DLT 대체 회로 연구
이훈희,허근재,정락규,유흥균,Lee Hun-Hee,Heo Keun-Jae,Jung Rag-Gyu,Ryu Heung-Gyoon 한국전자파학회 2004 한국전자파학회논문지 Vol.15 No.12
The conventional PLL(phase locked loop) frequency synthesizer takes a long switching time because of the inherent closed-loop structure. The digital hybrid PLL(DH-PLL) which includes the open-loop structure into the conventional PLL synthesizer has been studied to overcome this demerit. It operates in high speed, but the hardware complexity and power consumption are the serious problem because the DLT(digital look-up table) is usually implemented by the ROM which contains the transfer characteristic of VCO(voltage controlled oscillator). This paper proposes a new DH-PLL using a very simple DLT-replacement digital logic instead of the complex ROM-type DLT. Also, a timing synchronization circuit for the very small over-shoot and shorter settling time is designed for the ultra fast switching speed at every frequency synthesis. The hardware complexity gets decreased to about $28\%,$ as compared with the conventional DH-PLL. The high speed switching characteristic of the frequency synthesis process can be verified by the computer simulation and the circuit implementation.
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