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자동 개폐 시스템 내구 열화 고려한 소음 진동 최적화 구조 연구
변민형(Minhyung Byun),조정현(Junghyun Jo),박병성(Byungsung Park),임용혁(Younghyuk Im),이종원(Jongwon Lee),이윤종(Yoonjong Lee),홍석현(Sukhyun Hong) 한국자동차공학회 2020 한국자동차공학회 학술대회 및 전시회 Vol.2020 No.11
As consumers’ automatic open and close systems needs for vehicles grow, automation systems have recently been applied to many parts. Regardless of the dynamic characteristics of vehicles, it is often necessary to design such automation systems in places that are good for lay-out of vehicles when a single product is made by a business partner. However, development in this way may result in durability, operating sound problems as NVH elements are designed without consideration. Also, this is a huge loss due to the continued Carry Over through copy of the company’s products, not just one product. In this paper, the customer’s needs are qualitatively/quantitatively understood and specific. To set and achieve the goal, the purpose of applying the automatic switching system to the most advantageous position is to limit the systems that affect the operating sound and durability deterioration of the system, rather than to improve the durability, not to improve the operating sound, and the dynamic characteristics (ATF, Point Mobility) of the system. In addition to improving noise and durability degradation, the company also intends to reduce costs/weights at the same time to provide customers with superior merchantability compared to existing types.
임베디드 SRAM의 Built-in Access Time 측정 회로 설계
신우철(Woocheol Shin),백경일(Kyungil Baek),정현섭(Hyunsub Jung),여정현(Junghyun Yo),권건태(Geuntae Kwon),이윤종(Yoonjong Lee) 대한전자공학회 2016 대한전자공학회 학술대회 Vol.2016 No.11
In this paper, we propose the built-in digital logic architecture and method for measuring the access time of embedded SRAMs. The proposed built-in architecture for access time measurement can be designed with only CMOS STD cell libraries and implemented using the auto placement and route techniques, which enables the proposed architecture to be applied in other process technologies. The built-in architecture makes it possible to measure the access timing using automated method without human errors and additional errors from the external measurement equipment. The proposed architecture can measure the timing with the precision of tens of picoseconds by using an accurate delay control scheme. The function and timing of the proposed logic were verified using logic simulations and a silicon test chip with DongBu Hitek 0.13um process.