A Two-Point Modulation Spread-Spectrum Clock Generator With FIR-Embedded Binary Phase Detection and 1-Bit High-Order Δ∑Modulation

Ni Xu,Yiyu Shen,Sitao Lv,Han Liu,Woogeun Rhee,Zhihua Wang 대한전자공학회 2016 Journal of semiconductor technology and science Vol.16 No.4

This paper describes a spread-spectrum clock generation method by utilizing a Δ∑ digital PLL (DPLL) which is solely based on binary phase detection and does not require a linear time-to-digital converter (TDC) or other linear digital-to-time converter (DTC) circuitry. A 1-bit high-order Δ∑ modulator and a hybrid finite-impulse response (FIR) filter are employed to mitigate the phase-folding problem caused by the nonlinearity of the bang-bang phase detector (BBPD). The Δ∑ DPLL employs a two-point modulation technique to further enhance linearity at the turning point of a triangular modulation profile. We also show that the two-point modulation is useful for the BBPLL to improve the spread-spectrum performance by suppressing the frequency deviation at the input of the BBPD, thus reducing the peak phase deviation. Based on the proposed architecture, a 3.2 ㎓ spread-spectrum clock generator (SSCG) is implemented in 65 ㎚ CMOS. Experimental results show that the proposed SSCG achieves peak power reductions of 18.5 ㏈ and 11 ㏈ with 10 ㎑ and 100 ㎑ resolution bandwidths respectively, consuming 6.34 ㎽ from a 1 V supply.

A Two-Point Modulation Spread-Spectrum Clock Generator With FIR-Embedded Binary Phase Detection and 1-Bit High-Order ΔΣ Modulation

Xu, Ni,Shen, Yiyu,Lv, Sitao,Liu, Han,Rhee, Woogeun,Wang, Zhihua The Institute of Electronics and Information Engin 2016 Journal of semiconductor technology and science Vol.16 No.4

This paper describes a spread-spectrum clock generation method by utilizing a ${\Delta}{\Sigma}$ digital PLL (DPLL) which is solely based on binary phase detection and does not require a linear time-to-digital converter (TDC) or other linear digital-to-time converter (DTC) circuitry. A 1-bit high-order ${\Delta}{\Sigma}$ modulator and a hybrid finite-impulse response (FIR) filter are employed to mitigate the phase-folding problem caused by the nonlinearity of the bang-bang phase detector (BBPD). The ${\Delta}{\Sigma}$ DPLL employs a two-point modulation technique to further enhance linearity at the turning point of a triangular modulation profile. We also show that the two-point modulation is useful for the BBPLL to improve the spread-spectrum performance by suppressing the frequency deviation at the input of the BBPD, thus reducing the peak phase deviation. Based on the proposed architecture, a 3.2 GHz spread-spectrum clock generator (SSCG) is implemented in 65 nm CMOS. Experimental results show that the proposed SSCG achieves peak power reductions of 18.5 dB and 11 dB with 10 kHz and 100 kHz resolution bandwidths respectively, consuming 6.34 mW from a 1 V supply.

Study on Strength Characteristics and Microstructure of Completely Decomposed Migmatitic Granite

Song Yan,Hua Tang,Zhenjun Wu,Sitao Li,Peifeng Li 대한토목학회 2023 KSCE Journal of Civil Engineering Vol.27 No.1

Migmatitic granite is the product of mixed lithification and granitization, and completely decomposed migmatitic granite (CDMG) was formed after weathering. The engineering properties of CDMG are complex, and its engineering properties are complex after weathering, and water content has a great influence on the properties of (CDMG). Due to its loose structure and strong heterogeneity, it is difficult to determine its strength characteristics by conventional test methods. In the paper triaxial and micro-CT test were conducted to study the relationship between shear strength and microstructure of CDMG under different water content. The results show that with the increase of water content from 6% to 14%, the internal friction angle decreases from 31.8° to 27.3°, and the cohesion first increases from 76.5 kPa to 94.3 kPa and then decreases to 77.7 kPa. This is because the sliding friction coefficient between coarse particles decreases with the increase of water film thickness on the surface of particles, and the occlusal effect between coarse particles weakens and the displacement adjustment is easier during the triaxial loading process. Under different water content, the shear strength of CDMG is not sensitive to particle structure parameters including particle size, particle morphology and particle arrangement. The particle analysis results of post-test sample show that the crushing proportion of coarse particles increases with the increase of the internal friction angle. The clay minerals produce differential expansion potential with the increase of water content, and the porosity and pore connectivity first decrease and then increase. Cohesion has a linear relationship with porosity and pore connectivity. With the increase of porosity from 23.95% to 26.95%, cohesion decreases linearly by 17%. These results indicate that the internal friction angle of CDMG can be inferred by water content, and the cohesion can be inferred by porosity and pore connectivity obtained by microstructure analysis.

Investigation of Hetero - Material - Gate in CNTFETs for Ultra Low Power Circuits

Wei Wang,Min Xu,Jichao Liu,Na Li,Ting Zhang,Sitao Jiang,Lu Zhang,Huan Wang,Jian Gao 대한전자공학회 2015 Journal of semiconductor technology and science Vol.15 No.1

An extensive investigation of the influence of gate engineering on the CNTFET switching, high frequency and circuit level performance has been carried out. At device level, the effects of gate engineering on the switching and high frequency characteristics for CNTFET have been theoretically investigated by using a quantum kinetic model. It is revealed that hetero - material - gate CNTFET(HMG - CNTFET) structure can significantly reduce leakage current, enhance control ability of the gate on channel, and is more suitable for use in low power and high frequency circuits. At circuit level, using the HSPICE with look - up table(LUT) based Verilog - A models, the performance parameters of circuits have been calculated and the optimum combinations of ФM1/ФM2/ФM3 have been concluded in terms of power consumption, average delay, stability, energy consumption and power - delay product(PDP). We show that, compared to a traditional CNTFET - based circuit, the one based on HMG - CNTFET has a significantly better performance (SNM, energy, PDP). In addition, results also illustrate that HMG - CNTFET circuits have a consistent trend in delay, power, and PDP with respect to the transistor size, indicating that gate engineering of CNTFETs is a promising technology. Our results may be useful for designing and optimizing CNTFET devices and circuits.

Channel and Gate Workfunction-Engineered CNTFETs for Low-Power and High-Speed Logic and Memory Applications

Wei Wang,Hongsong Xu,Zhicheng Huang,Lu Zhang,Huan Wang,Sitao Jiang,Min Xu,Jian Gao 대한전자공학회 2016 Journal of semiconductor technology and science Vol.16 No.1

Carbon Nanotube Field-Effect Transistors (CNTFETs) have been studied as candidates for post Si CMOS owing to the better electrostatic control and high mobility. To enhance the immunity against short - channel effects (SCEs), the novel channel and gate engineered architectures have been proposed to improve CNTFETs performance. This work presents a comprehensive study of the influence of channel and gate engineering on the CNTFET switching, high frequency and circuit level performance of carbon nanotube field-effect transistors (CNTFETs). At device level, the effects of channel and gate engineering on the switching and high frequency characteristics for CNTFET have been theoretically investigated by using a quantum kinetic model. This model is based on two-dimensional non-equilibrium Green’s functions (NEGF) solved self - consistently with Poisson’s equations. It is revealed that hetero -material - gate and lightly doped drain and source CNTFET (HMG - LDDS - CNTFET) structure can significantly reduce leakage current, enhance control ability of the gate on channel, improve the switching speed, and is more suitable for use in low power, high frequency circuits. At circuit level, using the HSPICE with look - up table(LUT) based Verilog - A models, the impact of the channel and gate engineering on basic digital circuits (inverter, static random access memory cell) have been investigated systematically. The performance parameters of circuits have been calculated and the optimum metal gate workfunction combinations of ФM1/ФM2 have been concluded in terms of power consumption, average delay, stability, energy consumption and power - delay product (PDP). In addition, we discuss and compare the CNTFET-based circuit designs of various logic gates, including ternary and binary logic. Simulation results indicate that LDDS - HMG - CNTFET circuits with ternary logic gate design have significantly better performance in comparison with other structures.

Investigation of Hetero - Material - Gate in CNTFETs for Ultra Low Power Circuits

Wang, Wei,Xu, Min,Liu, Jichao,Li, Na,Zhang, Ting,Jiang, Sitao,Zhang, Lu,Wang, Huan,Gao, Jian The Institute of Electronics and Information Engin 2015 Journal of semiconductor technology and science Vol.15 No.1

An extensive investigation of the influence of gate engineering on the CNTFET switching, high frequency and circuit level performance has been carried out. At device level, the effects of gate engineering on the switching and high frequency characteristics for CNTFET have been theoretically investigated by using a quantum kinetic model. It is revealed that hetero - material - gate CNTFET(HMG - CNTFET) structure can significantly reduce leakage current, enhance control ability of the gate on channel, and is more suitable for use in low power and high frequency circuits. At circuit level, using the HSPICE with look - up table(LUT) based Verilog - A models, the performance parameters of circuits have been calculated and the optimum combinations of ${\Phi}_{M1}/{\Phi}_{M2}/{\Phi}_{M3}$ have been concluded in terms of power consumption, average delay, stability, energy consumption and power - delay product(PDP). We show that, compared to a traditional CNTFET - based circuit, the one based on HMG - CNTFET has a significantly better performance (SNM, energy, PDP). In addition, results also illustrate that HMG - CNTFET circuits have a consistent trend in delay, power, and PDP with respect to the transistor size, indicating that gate engineering of CNTFETs is a promising technology. Our results may be useful for designing and optimizing CNTFET devices and circuits.

Inkjet Printed Quantum Dots Color Conversion Layers for Full-color Micro-LED Displays

Feng Qin,Cao Liu,Wenhui Wu,Wenxiang Peng,Sitao Huo,Jiandong Ye,Shulin Gu 대한금속·재료학회 2023 ELECTRONIC MATERIALS LETTERS Vol.19 No.1

With the ever-growing demands for larger size and high resolution displays, Micro-light-emitting diode (Micro-LED) displaywith quantum dots (QDs) fi lm as color conversion layers (CCLs) has become one of the most promising candidates offuture display for its advantages in low power consumption and wide color range. In this study, we report a novel full-colordisplay based on blue Micro LED, which has patterned red and green QDs color conversion (QDCC) layers fabricated byinkjet printing (IJP). A structure of double-layer bank was designed to reduce color deviation, prevent crosstalk, and fl attenthe QDCC layer. By optimizing the thickness of the red/green QDCC layers and the wavelength of blue Micro LEDbacklights, a full-color QDCC-LED display with 228 PPI resolution and size of 1.11-inch was successfully fabricated andshowed superb performance. We not only eff ectively reduced crosstalk, but also improved the color conversion effi ciency ofQDs. In addition, this QDCC-LED display prepared by embedded bonding process shows a color gamut of 107.53% NTSC.

Channel and Gate Workfunction-Engineered CNTFETs for Low-Power and High-Speed Logic and Memory Applications

Wang, Wei,Xu, Hongsong,Huang, Zhicheng,Zhang, Lu,Wang, Huan,Jiang, Sitao,Xu, Min,Gao, Jian The Institute of Electronics and Information Engin 2016 Journal of semiconductor technology and science Vol.16 No.1

Carbon Nanotube Field-Effect Transistors (CNTFETs) have been studied as candidates for post Si CMOS owing to the better electrostatic control and high mobility. To enhance the immunity against short - channel effects (SCEs), the novel channel and gate engineered architectures have been proposed to improve CNTFETs performance. This work presents a comprehensive study of the influence of channel and gate engineering on the CNTFET switching, high frequency and circuit level performance of carbon nanotube field-effect transistors (CNTFETs). At device level, the effects of channel and gate engineering on the switching and high frequency characteristics for CNTFET have been theoretically investigated by using a quantum kinetic model. This model is based on two-dimensional non-equilibrium Green's functions (NEGF) solved self - consistently with Poisson's equations. It is revealed that hetero - material - gate and lightly doped drain and source CNTFET (HMG - LDDS - CNTFET) structure can significantly reduce leakage current, enhance control ability of the gate on channel, improve the switching speed, and is more suitable for use in low power, high frequency circuits. At circuit level, using the HSPICE with look - up table(LUT) based Verilog - A models, the impact of the channel and gate engineering on basic digital circuits (inverter, static random access memory cell) have been investigated systematically. The performance parameters of circuits have been calculated and the optimum metal gate workfunction combinations of ${\Phi}_{M1}/{\Phi}_{M2}$ have been concluded in terms of power consumption, average delay, stability, energy consumption and power - delay product (PDP). In addition, we discuss and compare the CNTFET-based circuit designs of various logic gates, including ternary and binary logic. Simulation results indicate that LDDS - HMG - CNTFET circuits with ternary logic gate design have significantly better performance in comparison with other structures.