http://chineseinput.net/에서 pinyin(병음)방식으로 중국어를 변환할 수 있습니다.
변환된 중국어를 복사하여 사용하시면 됩니다.
KorQuAD 2.0: 웹문서 기계독해를 위한 한국어 질의응답 데이터셋
김영민(Youngmin Kim),임승영(Seungyoung Lim),이현정(Hyunjeong Lee),박소윤(Soyoon Park),김명지(Myungji Kim) Korean Institute of Information Scientists and Eng 2020 정보과학회논문지 Vol.47 No.6
KorQuAD 2.0 is a Korean question and answering dataset consisting of a total of 100,000+ pairs. There are three major differences from KorQuAD 1.0, which is the standard Korean Q & A data. The first is that a given document is a whole Wikipedia page, not just one or two paragraphs. Second, because the document also contains tables and lists, it is necessary to understand the document structured with HTML tags. Finally, the answer can be a long text covering not only word or phrase units, but paragraphs, tables, and lists. As a baseline model, BERT Multilingual is used, released by Google as an open source. It shows 46.0% F1 score, a very low score compared to 85.7% of the human F1 score. It indicates that this data is a challenging task. Additionally, we increased the performance by no-answer data augmentation. Through the distribution of this data, we intend to extend the limit of MRC that was limited to plain text to real world tasks of various lengths and formats.
플립칩에서 솔더볼의 매개변수 변화에 따른 동적 해석 평가
김성걸(Kim SeongKeol),김한중(Kim HanJung),임승영(Lim SeungYoung),김순영(Kim SoonYoung),양인영(Yang InYoung),안은진(An EunJin) 한국생산제조학회 2010 한국공작기계학회 추계학술대회논문집 Vol.2010 No.-
Drop impact reliability assessment of solder joints on the Flip chip is one of the critical issues for growing use in the handheld products and environmental concerns. Our previous research has been showing that new solder ball compositions of Sn-3.0Ag-0.5Cu has better mechanical reliability than Sn-1.0Ag-0.5Cu. In this paper, Dynamic reliability analysis using Finite Element Analysis (FEA) is carried out to assess the factors affecting flip chip in drop reliability. The design parameters are size and thickness of chip, and size, pitch and array of solder ball with composition of Sn1.2Ag0.5Cu. The board systems by JEDEC standard including 15 chips, solder balls and PCB are modeled with various design parameter combinations, and through these simulations, maximum yield stress and strain at each chip are shown at the solder bumps. It is found that larger chip size, smaller chip array, smaller ball diameter, larger pitch, and larger chip thickness have bad effect on maximum yield stress and strain at solder ball of each chip.