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      • Novel Architecture of EER Transmitter with Class-E Amplifier

        Tadashi Suetsugu,Xiuqin Wei,Shotaro Kuga 전력전자학회 2015 ICPE(ISPE)논문집 Vol.2015 No.6

        This paper presents a novel architecture of the envelope elimination and restoration (EER) transmitter with the class-E amplifier. A design example is also given along with the PSpice-simuIation results. In the proposed architecture, a MOSFET is added and connected to the dc-feed inductance of the class-E amplifier in parallel, basing on the conventional Envelope Pulse Width Modulation (EPWM)-EER architecture. Therefore, it is possible to obtain no transient-attenuation performance, low surge voltage, and fast rising-time response by applying the proposed architecture. In other words, the proposed architecture can realize all performance of the improved EPWM-EER architecture, i.e., the Psuedo-EPWM or Preceding EPWM (pEPWM), but without carrying out the process of trial and error, which is required in the pEPWM architecture. The PSpice-simulation results show the effectiveness and validity of the proposed architecture.

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