RISS 학술연구정보서비스

검색
다국어 입력

http://chineseinput.net/에서 pinyin(병음)방식으로 중국어를 변환할 수 있습니다.

변환된 중국어를 복사하여 사용하시면 됩니다.

예시)
  • 中文 을 입력하시려면 zhongwen을 입력하시고 space를누르시면됩니다.
  • 北京 을 입력하시려면 beijing을 입력하시고 space를 누르시면 됩니다.
닫기
    인기검색어 순위 펼치기

    RISS 인기검색어

      검색결과 좁혀 보기

      선택해제

      오늘 본 자료

      • 오늘 본 자료가 없습니다.
      더보기
      • 무료
      • 기관 내 무료
      • 유료
      • SMART TrafGc Control System Designed Using Verilog HDL

        Mar Christian Mendoza,Rhea B. Magabo,Glenlie P. Avelino,Ben Joseph P. Avelino,Rionel B. Caldo ASCONS 2019 IJASC Vol.1 No.2

        Background/Objectives: Vehicular traffic is endlessly increasing everywhere that cause terrible traffic congestion on intersections. Methods/Statistical analysis: In this paper, the proponents brought the design of the traffic control system to mitigate this kind of setup. The central concept is to allow vehicles based on the first-in-first-out principle. Exceptional cases for emergency vehicle detection will be also introduced in order for the ambulance to reach its destination faster and effectively. The phases inclusive for this research are formulated Verilog source code, testbench modeling, simulation process via ISIM, and methodological stuff. The whole process has been synthesized and verified successfully. Findings: proposed system was designed through Verilog Hardware Description Language using the Xilinx ISE Design Suite 14.5 as for the primary software. Improvements/Applications: The proposed system allows emergency vehicles to pass along traffic and prioritizes the vehicles according to the first-in-first-out principle.

      연관 검색어 추천

      이 검색어로 많이 본 자료

      활용도 높은 자료

      해외이동버튼