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RISS 인기검색어
- 검색키워드
- 저자 : Bonwoong Koo (검색결과 2 건)
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- 유료
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Formation of Vertically Aligned Cobalt Silicide Nanowire Arrays Through a Solid-State Reaction
Seulah Lee,Jaehong Yoon,Bonwoong Koo,Dong Hoon Shin,Ja Hoon Koo,Cheol Jin Lee,Young-Woon Kim,Hyungjun Kim,Taeyoon Lee IEEE 2013 IEEE TRANSACTIONS ON NANOTECHNOLOGY Vol.12 No.5
<P>We report for the first time synthesis of high-density arrays of vertically well-aligned cobalt monosilicide (CoSi) nanowires (NWs) in a large area via a solid-state reaction. The vertical arrays of 1-μm-long Si NWs were first grown on a p-type (1 0 0) Si substrate by the aqueous electroless etching (AEE) method, and a 40-nm-thick Co layer was conformally deposited using a thermal atomic layer deposition system as revealed by SEM and transmission electron microscope analyses. The rapid thermal annealing process was carried out at various temperatures ranging from 700 to 1000 °C; the X-ray diffraction analysis confirmed that the polycrystalline CoSi NW arrays were formed at temperatures above 900 °C. The required high driving force for this silicide formation can be attributed to the significant amounts of oxygen-related contaminants at the defect sites of the highly rough surfaces of AEE-grown Si NWs. To demonstrate practical applications, field emitters and Schottky diodes were fabricated using the vertically aligned CoSi NW arrays. The field emission measurements showed a turn-on field of 10.9 V/μm and a field enhancement factor of 328, indicating the feasibility of vertically aligned CoSi NW arrays as promising field emitters. For the Schottky diodes, the measured Schottky barrier height was 0.52 eV and the estimated ideality factor obtained from the I-V characteristic curves was 2.28.</P>
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Graphene as an atomically thin barrier to Cu diffusion into Si
Hong, Juree,Lee, Sanggeun,Lee, Seulah,Han, Heetak,Mahata, Chandreswar,Yeon, Han-Wool,Koo, Bonwoong,Kim, Seong-Il,Nam, Taewook,Byun, Kisik,Min, Byung-Wook,Kim, Young-Woon,Kim, Hyungjun,Joo, Young-Chang The Royal Society of Chemistry 2014 Nanoscale Vol.6 No.13
<P>The evolution of copper-based interconnects requires the realization of an ultrathin diffusion barrier layer between the Cu interconnect and insulating layers. The present work reports the use of atomically thin layer graphene as a diffusion barrier to Cu metallization. The diffusion barrier performance is investigated by varying the grain size and thickness of the graphene layer; single-layer graphene of average grain size 2 ± 1 μm (denoted small-grain SLG), single-layer graphene of average grain size 10 ± 2 μm (denoted large-grain SLG), and multi-layer graphene (MLG) of thickness 5-10 nm. The thermal stability of these barriers is investigated after annealing Cu/small-grain SLG/Si, Cu/large-grain SLG/Si, and Cu/MLG/Si stacks at different temperatures ranging from 500 to 900 °C. X-ray diffraction, transmission electron microscopy, and time-of-flight secondary ion mass spectroscopy analyses confirm that the small-grain SLG barrier is stable after annealing up to 700 °C and that the large-grain SLG and MLG barriers are stable after annealing at 900 °C for 30 min under a mixed Ar and H2gas atmosphere. The time-dependent dielectric breakdown (TDDB) test is used to evaluate graphene as a Cu diffusion barrier under real device operating conditions, revealing that both large-grain SLG and MLG have excellent barrier performance, while small-grain SLG fails quickly. Notably, the large-grain SLG acts as a better diffusion barrier than the thicker MLG in the TDDB test, indicating that the grain boundary density of a graphene diffusion barrier is more important than its thickness. The near-zero-thickness SLG serves as a promising Cu diffusion barrier for advanced metallization.</P>
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