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윤길원(Gilwon Yoon),추현호(Hyunho Chu),김정문(Jungmoon Kim),김철우(Chulwoo Kim) 대한전자공학회 2007 대한전자공학회 학술대회 Vol.2007 No.11
In this paper, digitally controlled DC-DC buck converter for DVFS(dynamic voltage frequency scaling) in embedded CPU is presented. The proposed DC-DC converter is designed in a 0.18㎛ CMOS process. VCDL instead of commonly-used A/D converters. Dual VCDLs cancel the temperature variation of VCDLs. The DC-DC converter’s PWM frequency is 1㎒ with 6-bit at the supply voltage of 1.4V to 1.8V and cancels the temperature variation by about 85% between 0℃ and 85℃. Maximum efficiency is 91% at 1.4V with 350㎃.