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PDA 처리에 따른 Al₂O₃ 박막의 interface trapped charge에 의한 hump 현상 감소에 관한 연구
지상엽(Sang-Yeop Jee),서창수(Chang-Su Seo),김윤빈(Yun-Bin Kim),정숙진(Suk-Jin Jeong),박신근(Sin-Keun Park),정재영(Jae-Ryoung Jung),김장현(Jang-Hyun Kim),이종호(Jong-Ho Lee),황철성(Cheol-Seong Hwang) 대한전자공학회 2015 대한전자공학회 학술대회 Vol.2015 No.6
We studied the hump phenomenon reduction of AI₂O₃ film using the PDA (Post Deposition Annealing) process. In order to confirm it, we fabricated MOS (Metal Oxide Silicon) capacitor using AI₂O₃ gate insulator, which was deposited by ALD (Atomic layer deposition). Based on the C-V (Capacitance-Voltage) measurement result, hump, which is attributed to near interface traps, was observed in low frequency. We also observed that the hump of AI₂O₃ film is removed through the PDA process.
HDP CVD에서 공정 가스 유량 감소에 따른 D/S ratio의 변화에 의한 Gap-fil 특성 확인
박신근(Sin Keun Park),서창수(Chang-Su Seo),지상엽(Sang-Yeop Jee),김윤빈(Yun-Bin Kim),정숙진(Suk-Jin Jung),김장현(Jang Hyun Kim),김조원(Jo-Won Kim),이종호(Jong Ho Lee),황철성(Cheol Seong Hwang) 대한전자공학회 2015 대한전자공학회 학술대회 Vol.2015 No.6
We studied gap-fill properties by the change of Deposition-Sputter (D/S) ratio through the decrease of silane and oxygen total gas flow in STI process using HDP CVD. D/S ratio was reduced with the decrease of total gas flow. The details of optimized gap-fill condition is discussed in this paper.