http://chineseinput.net/에서 pinyin(병음)방식으로 중국어를 변환할 수 있습니다.
변환된 중국어를 복사하여 사용하시면 됩니다.
장성근,김윤장,Chang, Sung-Keun,Kim, Youn-Jang 한국전기전자재료학회 2017 전기전자재료학회논문지 Vol.30 No.10
We have evaluated the ferroelectric and electrical properties of pure $BiFeO_3$ (BFO) and $Bi_{0.9}A_{0.1}Fe_{0.975}V_{0.025}O_{3+{\alpha}}$ (A=Nd, Tb) thin films on $Pt(111)/Ti/SiO_2/Si(100)$ substrates by using a chemical solution deposition method. The remnant polarization ($2P_r$) of the $Bi_{0.9}Tb_{0.1}Fe_{0.975}V_{0.025}O_{3+{\alpha}}$ (BTFVO) thin film was approximately $65{\mu}C/cm^2$, with a maximum applied electric field of 950 kV/cm and a frequency of 10 kHz, where as that of the $Bi_{0.9}Nd_{0.1}Fe_{0.975}V_{0.025}O_{3+{\alpha}}$ (BNFVO) thin film was approximately $37{\mu}C/cm^2$ with a maximum applied electric field of 910 kV/cm. The leakage current density of the co-doped BNFVO thin film was four orders of magnitude lower than that of the pure BFO thin film, at $2.75{\times}10^{-7}A/cm^2$ with an applied electric field of 100 kV/cm. The grain size and uniformity of the co-doped BNFVO and BTFVO thin films were improved, in comparison to the pure BFO thin film, through structural modificationsdue to the co-doping with Nd and Tb.
NO기반 게이트절연막 NMOS의 AC Hot Carrier 특성
장성근,김윤장,Chang, Sung-Keun,Kim, Youn-Jang 한국전기전자재료학회 2004 전기전자재료학회논문지 Vol.17 No.6
We studied the dependence of hot-tarrier-induced degradation characteristics on nitrogen concentration in NO(Nitrided-Oxide) gate of nMOS, under ac and dc stresses. The $\Delta$V$_{t}$ and $\Delta$G$_{m}$ dependence of nitrogen concentration were observed, We observed that device degradation was suppressed significantly when the nitrogen concentration in the gate was increased. Compared to $N_2$O oxynitride, NO oxynitride gate devices show a smaller sensitivity to ac stress frequency. Results suggest that the improved at-hot carrier immunity of the device with NO gate may be due to the significantly suppressed interface state generation and neutral trap generation during stress.ess.
평면구조 P-MOS DRAM 셀의 커패시터 V<sub>T</sub> 이온주입의 최적화
장성근,김윤장,Chang Sung-Keun,Kim Youn-Jang 한국전기전자재료학회 2006 전기전자재료학회논문지 Vol.19 No.2
We investigated an optimized condition of the capacitor threshold voltage implantation(capacitor $V_T$ Implant) in planar P-MOS DRAM Cell. Several samples with different condition of the capacitor $V_T$ Implant were prepared. It appeared that for the capacitor $V_T$ Implant of $BF_2\;2.0{\times}l0^{13}\;cm^{-2}$ 15 KeV, refresh time is three times larger than that of the sample, in which capacitor $V_T$ Implant is in $BF_2\;1.0{\times}l0^{13}\;cm^{-2}$ 15 KeV. Raphael simulation revealed that the lowed maximum electric field and lowed minimum depletion capacitance ($C_{MIN}$) under the capacitor resulted in well refresh characteristics.
EEPROM 셀에서 폴리실리콘 플로팅 게이트의 도핑 농도가 프로그래밍 문턱전압에 미치는 영향
장성근,김윤장,Chang, Sung-Keun,Kim, Youn-Jang 한국전기전자재료학회 2007 전기전자재료학회논문지 Vol.20 No.2
We have investigated the effects of doping concentration in polysilicon floating gate on the endurance characteristics of the EEPROM cell haying the structure of spacer select transistor. Several samples were prepared with different implantation conditions of phosphorus for the floating gate. Results show the dependence of doping concentration in polysilicon floating gate on performance of EEPROM cell from the floating gate engineering point of view. All of the samples were endured up to half million programming/erasing cycle. However, the best $program-{\Delta}V_{T}$ characteristic was obtained in the cell doped at the dose of $1{\times}10^{15}/cm^{2}$.
Eu와 V 동시 도핑에 의한 BiFeO<sub>3</sub> 박막의 구조와 전기적 특성
장성근,김윤장,Chang, Sung-Keun,Kim, Youn-Jang 한국전기전자재료학회 2019 전기전자재료학회논문지 Vol.32 No.3
Pure $BiFeO_3$ (BFO) and (Eu, V) co-doped $Bi_{0.9}Eu_{0.1}Fe_{0.975}V_{0.025}O_{3+{\delta}}$ (BEFVO) thin films were deposited on $Pt(111)/Ti/SiO_2/Si(100)$ substrates by chemical solution deposition. The effects of co-doping were observed by X-ray diffraction, Raman spectroscopy, and scanning electron microscopy (SEM). The electrical properties of the BEFVO thin film were improved as compared to those of the pure BFO thin film. The remnant polarization ($2P_r$) of the BEFVO thin film was approximately $26{\mu}C/cm^2$ at a maximum electric field of 1,190 kV/cm with a frequency of 1 kHz. The leakage current density of the co-doped BEFVO thin film ($4.81{\times}10^{-5}A/cm^2$ at 100 kV/cm) was two orders of magnitude lower than of that of the pure BFO thin film.
안티퓨즈 MOS capacitor를 이용한 OTP 소자의 프로그래밍 후의 저항특성
장성근(Chang, Sung-Keun),김윤장(Kim, Youn-Jang) 한국산학기술학회 2012 한국산학기술학회논문지 Vol.13 No.6
안티퓨즈 MOS 커패시터를 기반으로 제작된 OTP 소자의 수율은 프로그램 과정에서 입력 저항(Rin)값과 통 과 트랜지스터(Pass Tr)의 크기, 데이터 읽기 과정에서 읽기 트랜지스터(Read Tr)와 읽기 전압에 영향을 받는다. 따라 서 수율에 영향을 주는 요소를 분석하기 위해 여러 가지 실험 조건을 달리하여 각각의 조건에 대해 블로잉 후 실효 소자의 저항 특성에 대한 풀 맵(full map) 데이터를 얻어 OTP 소자가 어떻게 동작하는지를 분석하여 수율 개선에 필 요한 최적 조건을 연구하였다. 최적 조건은 입력저항이 50Ω, 통과 트랜지스터의 W값이 10㎛, 읽기 전압이 2.8 V 일 때이다. The yield of OTP devices using anti-fuse MOS capacitor have been affected by the input resistance, the size of the pass transistor and the read transistor, and the readout voltage of programed cell. To investigate the element which gives an effect to yield, we analyze the full map data of the resistance characterization of OTP device and those data in a various experimental condition. As a result, we got the optimum conditions which is necessary to the yield improvement. The optimum conditions are as follows: Input resistance is 50 ohms, the channel length of pass transistor is 10um, read voltage is 2.8 volt, respectively.
DDI DRAM에서의 Column 불량 특성에 관한 연구
장성근(Chang, Sung-Keun),김윤장(Kim, Youn-Jang) 한국산학기술학회 2008 한국산학기술학회논문지 Vol.9 No.6
버팅 콘택을 가진 쌍극 폴리사이드 게이트 구조에서 폴리실리콘 내의 순 도핑(net doping) 농도는 n+/p+ 중첩 및 실리사이드J폴리실리콘 층에서 도펀트의 수평 확산에 기인하여 감소하였다. 버팅 콘택 영역에서의 쇼트키 다이 오드 형성은 CoSi₂의 열적 응집 현상에 의한 CoSi₂ 손실과 폴리실리콘 내의 농도 저하에 기인된다. DDI DRAM에서 기생 쇼트키 다이오드는 감지 증폭기의 노이즈 마진을 감소시켜 column성 불량을 일으킨다. Column성 불량은 n+/p+ 폴리실리콘 접합 부분을 물리적으로 분리시키거나, CoSi₂ 형성 전 질소 이온을 p+ 영역에 주입 시켜 CoSi₂의 응집 현상을 억제함으로써 줄일 수 있다. In dual-polycide-gate structure with butting contact, net doping concentration of polysilicon was decreased due to overlap between n+ and p+ and lateral dopant diffusion in silicide/polysilicon layers. The generation of parasitic Schottky diode in butting contact region is attributed both to the CoSi₂-loss due to CoSi₂ agglomeration and to the decrease in net doping concentration of polysilicon layer. Parasitic Schottky diode reduces noise margin of sense amplifier in DDI DRAM, which causes column fail. The column fail could be reduced by physical isolation of n+/p+ polysilicon-junction or suppressing CoSi2 agglomeration by using nitrogen implantation into p+ polysilicon before CoSi₂ formation.
DDI DRAM의 감지 증폭기에서 기생 쇼트키 다이오드 영향 분석
장성근(Chang, Sung-Keun),김윤장(Kim, Youn-Jang) 한국산학기술학회 2010 한국산학기술학회논문지 Vol.11 No.2
본 논문에서는 버팅 콘택(butting contact) 구조를 갖는 DDI DRAM소자의 감지 증폭기의 입력 게이트 단의 모든 기생 성분을 포함한 등가 회로를 제안 하였다. 제안한 모델을 이용하여 기생 쇼트키 다이오드가 감지 증폭기 동 작에 어떤 영향을 미치는지 분석하였다. 각각의 불량 가능성에 대해 감지 증폭기가 어떻게 동작하는지 분석하여 단측 불량 특성의 원인을 규명하였다. DDI DRAM에서 단측 불량 원인과 불량률의 온도 의존성은 감지 증폭기의 입력 게 이트 단에 형성된 기생 쇼트키 다이오드 형성에 기인한 것으로 판단된다. 이러한 기생 쇼트키 다이오드는 게이트 입 력에 기생 전압 강하를 야기하게 되고 결국 감지 증폭기의 노이즈 마진을 감소시켜 단측 불량률을 증가시킨다. We propose the equivalent circuit model including all parasitic components in input gate of sense amplifier of DDI DRAM with butting contact structure. We analysed the effect of parasitic schottky diode by using the proposed model in the operation of sense amplifier. The cause of single side fail and the temperature dependence of fail rate in DDI DRAM are due to creation of the parasitic schottky diode in input gate of sense amplifier. The parasitic schottky diode cause the voltage drop in input gate, and result in decreasing noise margin of sense amplifier. therefore single side fail rate increase.
김윤장,김진원,장성근,Kim, Youn-Jang,Kim, Jin-Won,Chang, Sung-Keun 한국전기전자재료학회 2018 전기전자재료학회논문지 Vol.31 No.4
Pure $BiFeO_3$ (BFO) and codoped $Bi_{0.9}A_{0.1}Fe_{0.975}Zn_{0.025}O_{3-{\delta}}$ (A=Eu, Dy) thin films were prepared on Pt(111)/Ti/$SiO_2$/Si(100) substrates by chemical solution deposition. The remnant polarizations (2Pr) of the $Bi_{0.9}Eu_{0.1}Fe_{0.975}Zn_{0.025}O_{3-{\delta}}$ (BEFZO) and $Bi_{0.9}Dy_{0.1}Fe_{0.975}Zn_{0.025}O_{3-{\delta}}$ (BDFZO) thin films were about 36 and $26{\mu}C/cm^2$ at the maximum electric fields of 900 and 917 kV/cm, respectively, at 1 kHz. The codoped BEFZO and BDFZO thin films showed improved electrical properties, and leakage current densities of 3.68 and $1.21{\times}10^{-6}A/cm^2$, respectively, which were three orders of magnitude lower than that of the pure BFO film, at 100 kV/cm.