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박홍식(Park, Hongsik) 경북대학교 인문학술원 2015 동서인문 Vol.0 No.4
A history of Korean thought can be divided by two kinds of sight. When judging one from linguistic sight, it"s possible to sort in the Hanja thought age and the Hangul alphabet thought age. From cultural sight it"s possible to divide other one by Confucianism, the Buddhism, the Taoism thought which are foreign culture and the peculiar thought. Settle-ization of Confucianism, the Buddhism and a Taoism thought became old already after progress was. When we think the character of the Korean thought, the separation of a foreign thought and a peculiar thought is always a necessary thing. Achievement of two kinds of philosophy thought is a philosophy thought of Toigye, Lee Hwang and a philosophy thought of Jeong Yak-yong in the hanja thought age. Toigye philosophy means birth of the Korean Neo-Confucianism philosopher. Jeong Yak-yong philosophy showed me birth of an independent Korean philosopher. But it is difficult to search for a independent philosophy thought written by Hangul alphabet in Korea. When judging from sight of a Korean history of thought, a new religion by Donghak means birth of a Hangul alphabet philosophy thought. There was no subordination in a Western thought, Confucianism, the Buddhism and a Taoism thought. A new religion by Donghakt showed us the birth of independent thought written by Korean. Therefore a new religion by Donghak showed us the korean identity in the history of Korean philosophy.
나노 입자 분리/분류를 위한 유전영동 칩 및 전극 패시베이션 기술 개발
박민수 ( Minsu Park ),노효웅 ( Hyowoong Noh ),강재운 ( Jaewoon Kang ),이준영 ( Junyeong Lee ),박홍식 ( Hongsik Park ) 한국센서학회 2021 센서학회지 Vol.30 No.2
Isolation and separation of biological nanoparticles, such as cells and extracellular vesicles, are important techniques for their characterization. Dielectrophoresis (DEP) based on microfluidic chips is an effective method to isolate and separate the nanoparticles. However, the electrodes of the DEP chips are electrolyzed by the electrical signals applied to the nanoparticles. Thus, the isolation/separation efficiency of the nanoparticles is reduced considerably. Through this study, we developed a microfluidic DEP chip for reliable isolation/separation of nanoparticles and developed a passivation technique for the protection of the DEP chip electrodes. The electrode passivation process was designed using a hydrogel and the stability of the hydrogel passivation layer was verified. The fabricated DEP chip and the proposed passivation technique were used for the collection and dispersion of the fluorescent polystyrene nanoparticles. The proposed chip and the technique for isolation and separation of nanoparticles can be leveraged in various bioelectronic applications.
균일하고 0 V에 가까운 Dirac 전압을 갖는 그래핀 전계효과 트랜지스터 제작 공정
박홍휘 ( Honghwi Park ),최무한 ( Muhan Choi ),박홍식 ( Hongsik Park ) 한국센서학회 2018 센서학회지 Vol.27 No.3
Monolayer graphene grown via chemical vapor deposition (CVD) is recognized as a promising material for sensor applications owing to its extremely large surface-to-volume ratio and outstanding electrical properties, as well as the fact that it can be easily transferred onto arbitrary substrates on a large-scale. However, the Dirac voltage of CVD-graphene devices fabricated with transferred graphene layers typically exhibit positive shifts arising from transfer and photolithography residues on the graphene surface. Furthermore, the Dirac voltage is dependent on the channel lengths because of the effect of metal-graphene contacts. Thus, large and nonuniform Dirac voltage of the transferred graphene is a critical issue in the fabrication of graphene-based sensor devices. In this work, we propose a fabrication process for graphene field-effect transistors with Dirac voltages close to zero. A vacuum annealing process at 300 °C was performed to eliminate the positive shift and channel-length-dependence of the Dirac voltage. In addition, the annealing process improved the carrier mobility of electrons and holes significantly by removing the residues on the graphene layer and reducing the effect of metal-graphene contacts. Uniform and close to zero Dirac voltage is crucial for the uniformity and low-power/voltage operation for sensor applications. Thus, the current study is expected to contribute significantly to the development of graphene-based practical sensor devices.
페이지 선반입 및 선사상을 위한 페이지 부재 궤적 분석
조성제(SungJe Cho),박홍식(HongSik Park),조유근(YooKun Cho) 한국정보과학회 1995 한국정보과학회 학술발표논문집 Vol.22 No.1
페이지 선반입(page prefetcing)은 다음에 참조될 페이지를 디스크로부터 미리 읽어들임으로써 페이지 반입 지연 시간을 줄여 준다. 본 논문에서는 디스크로부터 선반입할 페이지를 결정하기 위해 페이지 부재의 궤적(page fault trace)을 분석하였다. 메모리 부하가 적을때 페이지 부재의 궤적을 분석하여 보면, 총 부재에서 디스크로부터 입력을 필요로하는 페이지 부재의 비율은 응용에 따라 다소 차이는 있지만 7.2~26.1%로 비교적 적은 편이며, 대부분의 부재는 공유 라이브러리 영역이나 sbrk 시스템 호출 수행시 할당받는 heap 영역에서 발생한다. 이는 사용가능한 메모리의 용량이 가상 메모리 요구량보다 클때 페이지 선반입 기법만 사용해서는 많은 성능 향상을 기대할 수 없다는 것을 암시한다. 본 논문에서는 페이지 부재가 발생했을 때 프로세스가 다음에 참조할 페이지가 이미 메모리에 상주하거나 또는 가용 페이지를 할당하여 부재 발생을 예방할 수 있는 경우에는 다음 페이지를 미리 페이지 테이블에 사상(할당)하는 기법도 간략히 소개한다.
큰 결정 크기를 가지는 단일층 그래핀 성장을 위한 구리 호일의 전해연마 공정 최적화
김재억 ( Jaeeuk Kim ),박홍식 ( Hongsik Park ) 한국센서학회 2017 센서학회지 Vol.26 No.2
Graphene grown on copper-foil substrates by chemical vapor deposition (CVD) has been attracting interest for sensor applications due to an extraordinary high surface-to-volume ratio and capability of large-scale device fabrication. However, CVD graphene has a polycrystalline structure and a high density of grain boundaries degrading its electrical properties. Recently, processes such as electropolishing for flattening copper substrate has been applied before growth in order to increase the grain size of graphene. In this study, we systemically analyzed the effects of the process condition of electropolishing copper foil on the quality of CVD graphene. We observed that electropolishing process can reduce surface roughness of copper foil, increase the grain size of CVD graphene, and minimize the density of double-layered graphene regions. However, excessive process time can rather increase the copper foil surface roughness and degrade the quality of CVD graphene layers. This work shows that an optimized electropolishing process on copper substrates is critical to obtain high-quality and uniformity CVD graphene which is essential for practical sensor applications.