http://chineseinput.net/에서 pinyin(병음)방식으로 중국어를 변환할 수 있습니다.
변환된 중국어를 복사하여 사용하시면 됩니다.
박상헌 호남대학교 2002 호남대학교 학술논문집 Vol.23 No.2
Since 1987, when VHDL (VHSIC Hardware Description Language) became the formal international standard, the language has been gaining its popularity due to the widespread top down design methodology and the increasing need for ASICs (Application Specific Integrated Circuits). Although much effort has been put for the development of VHDL libraries and tools, the increasing design size and complexity are sill pushing the tool developers for more and better libraries and tools. However, it is not an easy task to develop tools that support the broad range of VHDL's descriptive capability while maintaining good performance. The development takes a long time and much effort because every tool needs to be able to analyze VHDL, descriptions, deal with complex intermediate data, and/or give much consideration to obtaining efficient data access. The development of VDT (VHDL, Developer's Toolkit) aims at providing a set of tools and an integrated environment to tool-developers so that they can speed up the development and integration of VHDl-related tools. The basic concept of VDT is similar to that of other exiting systems such as the IBM VHDL. Design System and CLSI's VTIP(VHDL, Tool Integration Platform). However, the internal structure of the existing systems are unclear and complex, and therefore, the systems are difficult to use. VDT has been built on a data model which is relatively simple but still maintain the full VHDL descriptive power. VDT also provides aa clear procedural interface between applications and the intermediate form. This paper presents VDT (VHDL, Developer's Toolkit) which has been developed to support fast and easy development and integration of VHDL application tools. VDT is a software package which is developed using object-oriented programming language. The toolkit provides a library of versatile routines and several utilities. As basic utilities, it provides a VHDL analyzer and a VHDl generator. The VHDL, analyzer parses the given VHDL code and constructs the intermediate form. The VHDL generator regenerates the corresponding VHDL code from the given intermediate form. The toolkit also provides a procedural interface through which application tools can efficiently manipulate VHDL intermediate forms. Procedural interface is a library of versatile routines which are used to handle the intermediate form. The toolkit is based on a data model which has been designed to ?? the basic structure of the VHDL intermediate form. The data model supports the full set of IEEE Std 1076-1993.