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Development of a Work Management System Based on Speech and Speaker Recognition
Gaybulayev, Abdulaziz,Yunusov, Jahongir,Kim, Tae-Hyong Institute of Embedded Engineering of Korea 2021 대한임베디드공학회논문지 Vol.16 No.3
Voice interface can not only make daily life more convenient through artificial intelligence speakers but also improve the working environment of the factory. This paper presents a voice-assisted work management system that supports both speech and speaker recognition. This system is able to provide machine control and authorized worker authentication by voice at the same time. We applied two speech recognition methods, Google's Speech application programming interface (API) service, and DeepSpeech speech-to-text engine. For worker identification, the SincNet architecture for speaker recognition was adopted. We implemented a prototype of the work management system that provides voice control with 26 commands and identifies 100 workers by voice. Worker identification using our model was almost perfect, and the command recognition accuracy was 97.0% in Google API after post- processing and 92.0% in our DeepSpeech model.
GUI-based Power Consumption Analysis Tool for Lower Power Embedded S/W Development in ESTO
Kim, Doo-Hyun,Lee, Keun Soo,Jung, Changhee,Woo, Duk-Kyun Institute of Embedded Engineering of Korea 2007 대한임베디드공학회논문지 Vol.2 No.3
In this paper, we present a time-triggered mechanism for providing energy consumption profiles in the level of C functions. The similar mechanisms have already been introduced at the previous researches such as PowerScope and ePRO. Instead, we, in this paper, introduce our efforts to extend these researches to incorporate power domains and DVS(Dynamic Voltage Scaling), then to provide GUI-based tool as a plug-in to ESTO which is an IDE for Embedded S/W development based on Eclipse. From our experimental results, we could conclude that our approach worked and produced consistent energy consumption profiles on the DVS-applied program codes, and also displayed function level and time domain power consumption information with diverse presentation skills such as tables, phi-chart, bar-chart, 2-D graphs, consequently, is expected to provide more ease-to-use and productive IDE for lower power embedded S/W developers.
Nassuna, Hellen,Kim, Jaehoon,Eyobu, Odongo Steven,Lee, Dongik Institute of Embedded Engineering of Korea 2020 대한임베디드공학회논문지 Vol.15 No.3
The detection and recognition of abnormal driving becomes crucial for achieving safety in Intelligent Transportation Systems (ITS). This paper presents a feature extraction method based on spectral data to train a neural network model for driving behavior recognition. The proposed method uses a two stage signal processing approach to derive time-saving and efficient feature vectors. For the first stage, the feature vector set is obtained by calculating variances from each frequency bin containing the power spectrum data. The feature set is further reduced in the second stage where an intersection method is used to select more significant features that are finally applied for training a neural network model. A stream of live signals are fed to the trained model which recognizes the abnormal driving behaviors. The driving behaviors considered in this study are weaving, sudden braking and normal driving. The effectiveness of the proposed method is demonstrated by comparing with existing methods, which are Particle Swarm Optimization (PSO) and Convolution Neural Network (CNN). The experiments show that the proposed approach achieves satisfactory results with less computational complexity.
Multi-Collector Control for Workload Balancing in Wireless Sensor and Actuator Networks
Han, Yamin,Byun, Heejung Institute of Embedded Engineering of Korea 2021 대한임베디드공학회논문지 Vol.16 No.3
The data gathering delay and the network lifetime are important indicators to measure the service quality of wireless sensor and actuator networks (WSANs). This study proposes a dynamically cluster head (CH) selection strategy and automatic scheduling scheme of collectors for prolonging the network lifetime and shorting data gathering delay in WSAN. First the monitoring region is equally divided into several subregions and each subregion dynamically selects a sensor node as CH. These can balance the energy consumption of sensor node thereby prolonging the network lifetime. Then a task allocation method based on genetic algorithm is proposed to uniformly assign tasks to actuators. Finally the trajectory of each actuator is optimized by ant colony optimization algorithm. Simulations are conducted to evaluate the effectiveness of the proposed method and the results show that the method performs better to extend network lifetime while also reducing data delay.
Lee, Jaewoo,Kim, HyunJin Institute of Embedded Engineering of Korea 2021 대한임베디드공학회논문지 Vol.16 No.5
We propose a novel, highly accurate approximate multiplier using different types of inexact 4-2 compressors. The importance of low hardware costs leads us to develop approximate multiplication for error-resilient applications. Several rules are developed when selecting a topology for designing the proposed multiplier. Our highly accurate multiplier design considers the different error characteristics of adopted compressors, which achieves a good error distribution, including a low relative error of 0.02% in the 8-bit multiplication. Our analysis shows that the proposed multiplier significantly reduces power consumption and area by 45% and 26%, compared with the exact multiplier. Notably, a trade-off relationship between error characteristics and hardware costs can be achieved when considering those of existing highly accurate approximate multipliers. In the image blending, edge detection and image sharpening applications, the proposed 8-bit approximate multiplier shows better performance in terms of image quality metrics compared with other highly accurate approximate multipliers.
Development of a Low-cost Industrial OCR System with an End-to-end Deep Learning Technology
Subedi, Bharat,Yunusov, Jahongir,Gaybulayev, Abdulaziz,Kim, Tae-Hyong Institute of Embedded Engineering of Korea 2020 대한임베디드공학회논문지 Vol.15 No.2
Optical character recognition (OCR) has been studied for decades because it is very useful in a variety of places. Nowadays, OCR's performance has improved significantly due to outstanding deep learning technology. Thus, there is an increasing demand for commercial-grade but affordable OCR systems. We have developed a low-cost, high-performance OCR system for the industry with the cheapest embedded developer kit that supports GPU acceleration. To achieve high accuracy for industrial use on limited computing resources, we chose a state-of-the-art text recognition algorithm that uses an end-to-end deep learning network as a baseline model. The model was then improved by replacing the feature extraction network with the best one suited to our conditions. Among the various candidate networks, EfficientNet-B3 has shown the best performance: excellent recognition accuracy with relatively low memory consumption. Besides, we have optimized the model written in TensorFlow's Python API using TensorFlow-TensorRT integration and TensorFlow's C++ API, respectively.
Daisy Chain Method for Control Allocation Based Fault-Tolerant Control
Kim, Jiyeon,Yang, Inseok,Lee, Dongik Institute of Embedded Engineering of Korea 2013 대한임베디드공학회논문지 Vol.8 No.5
This paper addresses a control allocation method for fault-tolerant control by redistributing redundant control surfaces. The proposed method is based on a classical daisy chain approach for the compensation of faulty actuators. The existing daisy chain method calculates a desired moment according to a number of actuator groups. However, this method has a significant limitation; that is, any faulty actuator belonging to the last actuator group cannot be compensated, since there is no more redundant actuator group that can be used to generate the required moments. In this paper, a modified daisy chain method is proposed to overcome this problem. Using the proposed method, the order of actuator groups is readjusted so that actuator groups containing any faulty actuator are always placed in an upper group instead of the last one. A set of simulation results with an F-18 HARV aircraft demonstrate that the proposed method can achieve better performance than the existing daisy chain method.
A Novel Weighting Factor Method in NLOS Environment
Guan, Xufeng,Hur, SooJun,Choi, JeongHee Institute of Embedded Engineering of Korea 2011 대한임베디드공학회논문지 Vol.6 No.2
Non-line-of-sight (NLOS) error is the most common and also a major source of errors in wireless location system. A novel weighting factor (NWF) method is presented in this paper, based on the RSS(Received Signal Strength) measurements, path loss model and Circular Disk of Scatterers Model (CDSM). The proposed positioning method effectively weighted the TOA distance measurements for each Base Station (BS). Simulation results show that the proposed method efficiently weighted the distance measurements and achieve higher localization accuracy than that of Linear Line of Position (LLOP) and Believable Factor Algorithm (BFA).
SeBo: Secure Boot System for Preventing Compromised Android Linux
김동민,김세원,유혁,Kim, Tong Min,Kim, Se Won,Yoo, Chuck Institute of Embedded Engineering of Korea 2015 대한임베디드공학회논문지 Vol.10 No.6
As the usage of mobile devices becomes diverse, a number of attacks on Android also have increased. Among the attacks, Android can be compromised by flashing a new image of compromised Android Linux. In order to solve this problem, we propose SeBo (Secure Boot System) which prevents compromised Android Linux by guaranteeing secure boot environment for mobile devices based on ARM TrustZone architecture. SeBo checks the hash value of the Android Linux image before the Android Linux executes. SeBo detects all the attacks within 5 seconds. Moreover, since SeBo only trusts the Secure Bootloader from Secure World, SeBo can reduce the additional overhead of checking the Normal Bootloader from Normal World.
An Efficient Variable Rearrangement Technique for STT-RAM Based Hybrid Caches
윤종희,조두산,Youn, Jonghee M.,Cho, Doosan Institute of Embedded Engineering of Korea 2016 대한임베디드공학회논문지 Vol.11 No.2
The emerging Spin-Transfer Torque RAM (STT-RAM) is a promising component that can be used to improve the efficiency as a result of its high storage density and low leakage power. However, the state-of-the-art STT-RAM is not ready to replace SRAM technology due to the negative effect of its write operations. The write operations require longer latency and more power than the same operations in SRAM. Therefore, a hybrid cache with SRAM and STT-RAM technologies is proposed to obtain the benefits of STT-RAM while minimizing its negative effects by using SRAM. To efficiently use of the hybrid cache, it is important to place write intensive data onto the cache. Such data should be placed on SRAM to minimize the negative effect. Thus, we propose a technique that optimizes placement of data in main memory. It drives the proper combination of advantages and disadvantages for SRAM and STT-RAM in the hybrid cache. As a result of the proposed technique, write intensive data are loaded to SRAM and read intensive data are loaded to STT-RAM. In addition, our technique also optimizes temporal locality to minimize conflict misses. Therefore, it improves performance and energy consumption of the hybrid cache architecture in a certain range.