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      • An auto-resize cache structure for high-performance and low-power

        Zhirui Liao,Jaehwan Kim,Jongwha Chong 대한전자공학회 2009 ITC-CSCC :International Technical Conference on Ci Vol.2009 No.7

        In this paper, we design a cache scheme which can reduce the power consumption and increase the performance of cache through auto-resize of L1 cache, which is called auto-selecting cache scheme. Cache memory occupies a significant fraction of a chip’s overall power consumption. Recent researches advocate using “resizable” to adjust cache capability based on the fact that requirement in applications will reduce cache size and power consumption. Based on the fact that different programs need different sizes of instruction and data cache, an auto-selecting cache scheme is proposed. This scheme can dynamically adjust the sizes of level 1 cache according to program requirement of instruction and data cache. The proposed structure can reduce power consumption and improve cache performance. According to the SPEC2000 simulation, the average power consumption of L1 cache is reduced by 7.43% and the average of energy delay production is improved by 16.08% with auto-selecting cache structure compared traditional one.

      • MPCore Based Task Scheduling under Peak Power Constraint

        Sunghwan Park,Byunggyu Ahn,Junmo Jung,Hyunglae Roh,Bong-sik Sihn,Liao ZhiRui,Jongwha Chong 대한전자공학회 2007 ITC-CSCC :International Technical Conference on Ci Vol.2007 No.7

        In this paper, we propose a new task scheduling algorithm which can chedule tasks under peak power constraint for MPCore systems. To gain accurate power profile of each task, we simulate the tasks under virtual platform which can estimate power consumption of each instruction. And then, we apply PWL (Piece-Wise Linear) modeling to the power profile of each task to divide a task to some sub-tasks. To meet peak power and average power constraints, we schedule each sub-task in MPCore. If there is no dependency between tasks, we use DVS algorithm in each core to minimize power consumption. We demonstrate the proposed approaches using some benchmark applications.

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