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M. V. Ganeswara Rao,N. Ramanjaneyulu,Sumalatha Madugula,N. P. Dharani,K. Rajesh Babu,Kallepelli Sagar 한국전기전자재료학회 2024 Transactions on Electrical and Electronic Material Vol.25 No.2
In this article, we delve into the reliability of various oxide/4H-SiC interfaces when exposed to elevated temperatures and carrier-trapping conditions. Our investigation primarily centers around the impact of diff erent gate dielectric materials on the electrical characteristics of a low breakdown 4H-SiC-based MOSFET. The gate dielectrics under scrutiny include SiO2, Si3N4, AlN, Al2O3, Y2O3, and HfO2. We fi nd that the choice of gate oxide material signifi cantly infl uences the transistor’s performance, with gate oxides possessing higher relative permittivity notably enhancing its characteristics. Among the materials studied, HfO2 emerges as the most promising candidate, demonstrating superior immunity behaviors in the MOSFET. However, the use of HfO2 is associated with increased gate leakage current. To mitigate this drawback, we introduce a thin interfacial layer (2 nm-thick) in the HfO2/4H-SiC MOS structure. Interestingly, two alternative gate stacked dielectrics, involving either SiO2 or Al2O3, prove effective in preserving the transistor’s on-state performance metrics while limiting gate leakage current across the entire range of gate voltages examined. To validate the predictive capabilities of our modeling analysis, we compare our simulation results with experimental data from the literature, and we observe a favorable agreement. This research holds particular signifi cance in applications employing low-power MOSFETs, where reliability and durability are as critical as performance. For instance, in the context of power optimizers for photovoltaic modules, which fall under the category of low-load and low-voltage DC–DC converters, these devices play a pivotal role in enhancing energy generationunder challenging environmental conditions while ensuring long-term reliability.