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Elaboration of (Steel/Cemented Carbide) Multimaterial by Powder Metallurgy
Pascal Celine,Chaix Jean-Marc,Dutt Ankur,Lay Sabine,Allibert Colette H. 한국분말야금학회 2006 한국분말야금학회 학술대회논문집 Vol.2006 No.1
A steel/cemented carbide couple is selected to generate a tough/hard two layers material. Sintering temperature and composition are deduced from phase equilibria, and experimental studies are used to determine optimal conditions. Liquid migration from the hard layer to the tough one is observed. Microstructure evolution during sintering of the tough material (TEM, SEM, image analysis) evidences coupled mechanisms of pore reduction and WC dissolution. Liquid migration, as well as interface crack formation due to differential densification are limited by suitable temperature and time conditions.
Improvement in Electrical Characteristics of BE-SONOS Using High-k Dielectrics in Tunneling Barrier
Vaibhav Neema,Mansimran Kaur,Deepika Gupta,Santosh Kumar Vishvakarma,Arya Dutt,Ankur Beohar 한국전기전자재료학회 2021 Transactions on Electrical and Electronic Material Vol.22 No.3
In this paper, we have analyzed the effect of high-k dielectrics in the tunneling barrier of bandgap engineered Silicon Oxide Nitride Oxide Silicon (BE-SONOS). The high-k materials used, hereby, are scandates and aluminates of the rare earth materials such as GdScO, LuAlO, and LaAlO. These materials have high permittivity and low valence band off set that helps in improving the erase speed and retention trade-off . Also, lower conduction band off set of these high-k dielectrics leads to the improvement of program speed. Here, scandate of the rare earth material, GdScO, substitutes the nitride (SiN) layer and the aluminates of the rare earth material, LuAlO and LaAlO, are used in place of top oxide (SiO 2 ) layer in tunneling barrier (SiO 2 /SiN/SiO 2 ) of BE-SONOS. Further, with the scaling of the gate length; for the same effective oxide thickness, it has been observed that the investigated stacks encompass the same memory dynamics as before the gate length scaling. Consequently, the investigated tunneling barrier stacks represent robustness in terms of retention (at room temperature and 150 ºC) and enhanced program speed as well as erase speed and retention trade-off .