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다공질 실리콘 (Porous Silicon) 의 열산화
양천순,박정용,이종현,Yang, Cheon-Soon,Park, Jeong-Yong,Lee, Jong-Hyun 대한전자공학회 1990 전자공학회논문지 Vol. No.
다공질 실리콘을 열산화할 때 산화의 온도 의존성과 IR흡수 스펙트럼을 조사하여 다공질 실리콘외 산화특성을 조사하였다. PSL(porous silicon layer)을 $700^{\circ}C$에서 1시간, $1100^{\circ}C$에서 1시간으로 2단계 습식산화시켜 bulk 실리콘의 열산화막과 같은 성질의 수십 ${\mu}m$두께의 OPSL(oxidized porous silicon layer)을 짧은 시간에 형성시킬 수 있으며, 식각율과 항복전계는 산화온도와 산화 분위기에 크게 의존하는 것으로 나타났다. 이때 PSL의 산화율은 약 390nm/s이고, 항복전계는 1.0MV/cm~2.0MV/cm의 분포를 갖는다. 웨이퍼 휨을 측정하여 고온 열산화시 발생하는 산화막의 stress를 조사하였다. $1000^{\circ}C$ 이상의 고온에서 건식산화할 경우 발생하는 stress는 ${10^2}dyne/{cm^2}~{10^10}dyne/{cm^2}$로 측정되었다. The progress of oxidation of a porous silicon layer(PSL) was studied by examining the temperature dependence of the oxidation and the infrared absorption spectra. Thick OPSL(oxidized porous silicon layer). which has the same properties as thermal T>$SiO_{2}$</TEXT> of bulk silicon, is formed in a short time by two steps wet oxidation of PSL at $700^{\circ}C$, 1 hr and $1100^{\circ}C$, 1 hr. Etching rate, breakdown strength of the OPSL are strongly dependent on the oxidation temperature, oxidation atmosphere. And its breakdown field was ${1\MV/cm^-2}$ MV/cm The oxide film stress was determined through curvature measurement using a dial gauge. During oxidation at temperature above $1000^{\circ}C$ in dry $O_{2}$, stress on the order of ${10^9}\dyne/{cm^2}{-10^10}\dyne/{cm^2}$ are generated in the OPSL.
양천순,이종현 경북대학교 센서기술연구소 1990 센서技術學術大會論文集 Vol.1 No.1
Recently the single crystalline silicon-on-insulator(SOI) structures have attracted a special interest for its perfect isolation. Oxidation of porous silicon is one of the very good prospects in the field of integrated circuits and solid-state transducers. Selective porous silicon layer(PSL) was formed in the n^(+) region of an n/n^(+)/n silicon structure using the FIPOS(full isolation by porous oxidized silicon) technique. And MOS devices were fabricated on insulated single crystal silicon islands. SOI structures are fabricated at room temperature by anodic oxidation of PSL. At the end step of IC fabrication process, device isolation by the SOI structures will be achieved by these new techniques here proposed.
李鍾玄,曺贊燮,梁天淳 慶北大學校 1991 論文集 Vol.51 No.-
Porous silicon layer (PSL) was fabricated by anodic reaction of n^+ layer of n^+/n silicon structures. The dependence of HF concentration, applied bias and reaction time on the porosity of PSL were investigated. A FIPOS-SOI which has 100 win width and 3 ㎛ thickness was fabricated using n/n^+/n silicon structures. MOSFET devices were fabricated on silicon islands. The breakdown field intensities of buried insulator in SOI structures were distributed between 0.6-2.0 MV/㎝. The threshold voltage, transconductance. and hole mobility of p-MOSFET/SOI with W/L ratio 60/15 were -4.2 V. 4.02× 10 exp (-6) Ω^-1 and 145 ㎠/V·sec. respectively. Subthreshold slope and leakage current were 150 mV/decade and 0.2 nA. Silicon microstructures were achieved for the application to sensors using FIPOS technology. PSL was formed in n^+ silicon layer of n/n^+/n structures and was etched off in 5 wt% NaOH solution. The microstructures were 50 ㎛ wide, 100 - 500 ㎛ long, and 4 ㎛ thick micro pans for cantilever and bridge. SEM photographs were shown for each part.
이용현,이종현,양천순 경북대학교 전자기술연구소 1989 電子技術硏究誌 Vol.10 No.1
The stress induced by the oxidation can be avoided by the anodic oxidation and the two step PSL formation technique. SOI strip line with 20-400um width are fabricated at room temperature by anodic oxidation, of PSL and were investigated its characteristics.