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CMOS 0.18㎛ 공정을 이용한 Active Inductor Load를 가지는 3-5㎓ UWB LNA 설계
정하용(HaYong Jung),채성호(SungHo Chai),정진호(Jinho Jeong),박찬형(Chan Hyeong Park) 대한전자공학회 2007 대한전자공학회 학술대회 Vol.2007 No.11
This paper presents an ultra-wideband (UWB) CMOS low noise amplifier (LNA) topology that operates in 3-5 ㎓ band. The common gate structure provides wideband input matching and flattens the passband gain. The proposed UWB amplifier is implemented in 0.18 ㎛ CMOS technology for lower band operation mode. Simulation shows a minimum noise figure of 3.5 ㏈, a power gain of 15 ㏈, less-than -10 ㏈ of input and output matching, with a power consumption of 24.4 ㎽.