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게이트 바이어스 스트레스 변화를 줄일 수 있는 다층 게이트 절연층 OTFT 제작
조현덕(Hyunduck Cho),곽정훈(Jeonghun Kwak),이창희(C. H. Lee) 대한전자공학회 2007 대한전자공학회 학술대회 Vol.2007 No.11
The change of pentacene OTFT Characteristics under negative gate bias stress is analyzed. For PVA gate dielectric, positive threshold voltage shift was observed. But for PMMA gate dielectric, the polarity of threshold voltage shift was in the opposite direction. The cause of these different gate bias effects are considered as electron trap from gate electrode for PVA and hole trap from source/drain for PMMA. OTFT with multi-layer gate dielectric(PMMA/PVA) is fabricated and shows small gate-bias-stress effect.
PCBM을 이용한 n-type OTFT 제작 및 TFT 저항 연구
곽정훈(Jeonghun Kwak),조현덕(Hyunduck Cho),이창희(Changhee Lee) 대한전자공학회 2007 대한전자공학회 학술대회 Vol.2007 No.11
We fabricated n-type OTFTs using PCBM as an active layer by spin-coating and vacuum evaporation. Both devices showed the mobility about 0.003~0.01 ㎠/Vs, and the threshold voltage about 40V. The TFT-on resistance was compared by measuring the TFT characteristics. We also compared the contact resistance between Al and Au for the source and drain electrode. We can apply TFT resistance analysis to electronic circuitry for OTFTs.