Si Solar Cell Progress in SKKU

Junsin Yi(이준신),Youngseok Lee(이영석),Cheolmin Park(박철민) 한국신재생에너지학회 2017 한국신재생에너지학회 학술대회논문집 Vol.2017 No.5

Brief Review of Silicon Solar Cells

Junsin Yi(이준신) 한국진공학회(ASCT) 2007 Applied Science and Convergence Technology Vol.16 No.3

태양광발전이란 태양에너지를 직접 전기 에너지로 변환시키는 것이다. 지난 5년 동안 태양광발전은 세계적으로 높은 성장률을 보여 왔다. 특히 2006년에는 30%이상의 성장을 가져왔으며 앞으로 20년 동안 평균 생산 성장률은 매년 27% - 34%가 될 것으로 예상하고 있다. 현재까지는 태양광발전을 이용해 생산된 전력의 가격은 기존 전력발전의 가격보다 높지만 태양광 기술의 발전과 효율의 향상으로 점점 그 가격이 떨어지고 있다. 뿐만 아니라 태양전지용의 실리콘 기판의 대량생산은 점점 더 태양전지의 가격 저하를 가져오고 있다. 태양전지의 변화효율의 한계는 30%이다. 현재에는 결정질 실리콘 태양전지가 주를 이루고 있지만 미래에는 박막 실리콘 태양전지가 주도를 이룰 것이다. 2030년에는 박막 태양전지가 90% 이상을 이루고 결정질 태양전지는 10% 이하로 떨어질 것을 예상하고 있다. 성균관대학교에서는 결정질 실리콘 태양전지의 저가화와 고효율화를 주 연구로 수행하고 있다. 현재 성균관대학교에서는 스크린 프린트를 이용해서 16% 이상의 다결정 실리콘 태양전지와 17% 이상의 단결정 실리콘 태양전지를 성공적으로 제작하였다. 제 1세대에서 다음 세대의 태양전지 발전의 과정은 새로운 접근법으로 확대되지만 여전히 실리콘이 지금까지 주된 재료로 쓰이고 있다. 2010년까지 이러한 기술들에 대한 격차는 여전히 있지만 태양광발전을 통한 전력생산의 가격은 60 cent/watt 정도로 예상하고 있다. 태양광발전은 청정에너지로서 재생불가능 하고 고갈되어가고 환경오염을 일으키는 다른 에너지와 비교하여 점점 대체에너지로서의 자리를 확립해 가고 있다. Photovoltaic (PV) technology permits the transformation of solar light directly into electricity. For the last five years, the photovoltaic sector has experienced one of the highest growth rates worldwide (over 30% in 2006) and for the next 20 years, the average production growth rate is estimated to be between 27% and 34% annually. Currently the cost of electricity produced using photovoltaic technology is above that for traditional energy sources, but this is expected to fall with technological progress and more efficient production processes. A large scale production of solar grade silicon material of high purity could supply the world demand at a reasonably lower cost. A shift from crystalline silicon to thin film is expected in the future. The technical limit for the conversion efficiency is about 30%. It is assumed that in 2030 thin films will have a major market share (90%) and the share of crystalline cells will have decreased to 10%. Our research at Sungkyunkwan University of South Korea is confined to crystalline silicon solar cell technology. We aim to develop a technology for low cost production of high efficiency silicon solar cell. We have successfully fabricated silicon solar cells of efficiency more than 16% starting with multicrystalline wafers and that of efficiency more than 17% on single crystalline wafers with screen printing metallization. The process of transformation from the first generation to second generation solar cell should be geared up with the entry of new approaches but still silicon seems to remain as the major material for solar cells for many years to come. Local barriers to the implementation of this technology may also keep continuing up to year 2010 and by that time the cost of the solar cell generated power is expected to be 60 cent per watt. Photovoltaic source could establish itself as a clean and sustainable energy alternate to the ever depleting and polluting non-renewable energy resource.

고효율 결정질 실리콘 태양전지 적용을 위한 p타입 에미터 표면의 전계 효과를 이용한 실리콘 산화막 패시베이션

박수영 ( Sooyoung Park ),심경배 ( Gyungbae Shim ),한상욱 ( Sanguk Han ),안시현 ( Shihyun Ahn ),박철민 ( Cheolmin Park ),조영현 ( Younghyun Cho ),김현후 ( Hyunhoo Kim ),이준신 ( Junsin Yi ) 한국신·재생에너지학회 2017 신재생에너지 Vol.13 No.4

The surface passivation is one of the crucial steps to achieve high conversion efficiencies in c-Si solar cells. A thermally stable thin film with a negative charge (for p-type surface) passivation layer is required to develop a good front passivation suitable for n-type c-Si solar cells. Silicon suboxide (SiOX) layer using PECVD provides a good passivation layer which has low temperature process and charge control in thin-film layer. In this paper, a PECVD stack layer consisting of SiOX and SiNX was employed for front side passivation. The optimal refractive index of SiOX and SiNX were found by varying the silane (SiH₄), ammonia (NH₃) and nitrous oxide (N₂O) gas ratio for decrease optical loss. -1.71 × 10 ¹¹ cm^-2 of negative charge (Q_f) and 5×10 10 cm ^-2 eV ^-1 of D_it (interface trap density) were obtained at 10 nm thick SiOX thin-film. With this optimized SiOx/SiNx stack layer on p ⁺ surface wafer using PECVD, the effective lifetime of 280 ㎲ and implied VOC of 690 mV were achieved. It is expected that the efficiency of the n-type silicon solar cell can be improved by applying the optimized SiOx condition to the front passivation layer.

Brief Review of Silicon Solar Cells

이준신,Yi, Jun-Sin The Korean Vacuum Society 2007 Applied Science and Convergence Technology Vol.16 No.3

태양광발전이란 태양에너지를 직접 전기 에너지로 변환시키는 것이다. 지난 5년 동안 태양광발전은 세계적으로 높은 성장률을 보여 왔다. 특히 2006년에는 30%, 이상의 성장을 가져왔으며 앞으로 20년 동안 평균 생산 성장률은 매년 27%-34%가 될 것으로 예상하고 있다. 현재까지는 태양광발전을 이용해 생산된 전력의 가격은 기존 전력발전의 가격보다 높지만 태양광 기술의 발전과 효율의 향상으로 점점 그 가격이 떨어지고 있다. 뿐만 아니라 태양전지용의 실리콘 기판의 대량생산은 점점 더 태양전지의 가격 저하를 가져오고 있다. 태양전지의 변화효율의 한계는 30%이다. 현재에는 결정질 실리콘 태양전지가 주를 이루고 있지만 미래에는 박막 실리콘 태양전지가 주도를 이룰 것이다. 2030년에는 박막 태양전지가 90%이상을 이루고 결정질 태양전지는 10% 이하로 떨어질 것을 예상하고 있다. 성균관대학교에서는 결정질 실리콘 태양전지의 저가화와 고효율화를 주 연구로 수행하고 있다. 현재 성균관대학교에서는 스크린 프린트를 이용해서 16% 이상의 다결정 실리콘 태양전지와 17% 이상의 단결정 실리콘 태양전지를 성공적으로 제작하였다. 제 1세대에서 다음 세대의 태양전지 발전의 과정은 새로운 접근법으로 확대되지만 여전히 실리콘이 지금까지 주된 재료로 쓰이고 있다. 2010년까지 이러한 기술들에 대한 격차는 여전히 있지만 태양광발전을 통한 전력생산의 가격은 60 cent/watt 정도로 예상하고 있다. 태양광발전은 청정에너지로서 재생불가능 하고 고갈되어가고 환경오염을 일으키는 다른 에너지와 비교하여 점점 대체에너지로서의 자리를 확립해 가고 있다. Photovoltaic (PV) technology permits the transformation of solar light directly into electricity. For the last five years, the photovoltaic sector has experienced one of the highest growth rates worldwide (over 30% in 2006) and for the next 20 years, the average production growth rate is estimated to be between 27% and 34% annually. Currently the cost of electricity produced using photovoltaic technology is above that for traditional energy sources, but this is expected to fall with technological progress and more efficient production processes. A large scale production of solar grade silicon material of high purity could supply the world demand at a reasonably lower cost. A shift from crystalline silicon to thin film is expected in the future. The technical limit for the conversion efficiency is about 30%. It is assumed that in 2030 thin films will have a major market share (90%) and the share of crystalline cells will have decreased to 10%. Our research at Sungkyunkwan University of South Korea is confined to crystalline silicon solar cell technology. We aim to develop a technology for low cost production of high efficiency silicon solar cell. We have successfully fabricated silicon solar cells of efficiency more than 16% starting with multicrystalline wafers and that of efficiency more than 17% on single crystalline wafers with screen printing metallization. The process of transformation from the first generation to second generation solar cell should be geared up with the entry of new approaches but still silicon seems to remain as the major material for solar cells for many years to come. Local barriers to the implementation of this technology may also keep continuing up to year 2010 and by that time the cost of the solar cell generated power is expected to be 60 cent per watt. Photovoltaic source could establish itself as a clean and sustainable energy alternate to the ever depleting and polluting non-renewable energy resource.

NH₃ Plasma Treatment를 사용한 고성능 TFT 제작 및 분석

박희준,이준신,Park, Heejun,Nguyen, Van Duy,Yi, Junsin 한국전기전자재료학회 2017 전기전자재료학회논문지 Vol.30 No.8

The effect of $NH_3$ plasma treatment on device characteristics was confirmed for an optimized thin film transistor of poly-Si formed by ELA. When C-V curve was checked for MIS (metal-insulator-silicon), Dit of $NH_3$ plasma treated and MIS was $2.7{\times}10^{10}cm^{-2}eV^{-1}$. Also in the TFT device case, it was decreased to the sub-threshold slope of 0.5 V/decade, 1.9 V of threshold voltage and improved in $26cm^2V^{-1}S^{-1}$ of mobility. Si-N and Si-H bonding reduced dangling bonding to each interface. When gate bias stress was applied, the threshold voltage's shift value of $NH_3$ plasma treated device was 0.58 V for 1,000s, 1.14 V for 3,600s, 1.12 V for 7,200s. As we observe from this quality, electrical stability was also improved and $NH_3$ plasma treatment was considered effective for passivation.

LCD Module내 COF Bending에 따른 Lead Broken Failure의 개선

심범주,최열,이준신,Shim, Boum-Joo,Choi, Yeol,Yi, Jun-Sin 한국전기전자재료학회 2008 전기전자재료학회논문지 Vol.21 No.3

TCP(Tape Carrier Package), COG (Chip On Glass), COF(Chip On Film) are three methods for connecting LDI(LCD Driver IC) with LCD panels. Especially COF is growing its portion of market place because of low cost and fine pitch correspondence. But COF has a problem of the lead broken failure in LCD module process and the usage of customer. During PCB (Printed Circuit Board) bonding process, the mismatch of the coefficient of thermal expansion between PCB and D-IC makes stress-concentration in COF lead, and also D-IC bending process during module assembly process makes the level of stress in COF lead higher. As an affecting factors of lead-broken failure, the effects of SR(Solder Resister) coating on the COF lead, surface roughness and grain size of COF lead, PI(Polyimide) film thickness, lead width and the ACF(Anisotropic Conductive Film) overlap were studied, The optimization of these affecting manufacturing processes and materials were suggested and verified to prevent the lead-broken failure.

N-type 고효율 태양전지용 Boron Diffused Layer의 형성 방법 및 특성 분석

심경배,박철민,이준신,Shim, Gyeongbae,Park, Cheolmin,Yi, Junsin 한국전기전자재료학회 2017 전기전자재료학회논문지 Vol.30 No.3

N-type crystalline silicon solar cells have high metal impurity tolerance and higher minority carrier lifetime that increases conversion efficiency. However, junction quality between the boron diffused layer and the n-type substrate is more important for increased efficiency. In this paper, the current status and prospects for boron diffused layers in N-type crystalline silicon solar cell applications are described. Boron diffused layer formation methods (thermal diffusion and co-diffusion using $a-SiO_X:B$), boron rich layer (BRL) and boron silicate glass (BSG) reactions, and analysis of the effects to improve junction characteristics are discussed. In-situ oxidation is performed to remove the boron rich layer. The oxidation process after diffusion shows a lower B-O peak than before the Oxidation process was changed into $SiO_2$ phase by FTIR and BRL. The $a-SiO_X:B$ layer is deposited by PECVD using $SiH_4$, $B_2H_6$, $H_2$, $CO_2$ gases in N-type wafer and annealed by thermal tube furnace for performing the P+ layer. MCLT (minority carrier lifetime) is improved by increasing $SiH_4$ and $B_2H_6$. When $a-SiO_X:B$ is removed, the Si-O peak decreases and the B-H peak declines a little, but MCLT is improved by hydrogen passivated inactive boron atoms. In this paper, we focused on the boron emitter for N-type crystalline solar cells.

박막트랜지스터 응용을 위한 SiO₂ 박막 특성 연구

서창기,심명석,이준신,Seo, Chang-Ki,Shim, Myung-Suk,Yi, Junsin 한국전기전자재료학회 2004 전기전자재료학회논문지 Vol.17 No.6

Silicon dioxide (SiO$_2$) is widely used as a gate dielectric material for thin film transistors (TFT) and semiconductor devices. In this paper, SiO$_2$ films were grown by APCVD(Atmospheric Pressure chemical vapor deposition) at the high temperature. Experimental investigations were carried out as a function of $O_2$ gas flow ratios from 0 to 200 1pm. This article presents the SiO$_2$ gate dielectric studies in terms of deposition rate, refrative index, FT-IR, C-V for the gate dielectric layer of thin film transistor applications. We also study defect passivation technique for improvement interface or surface properties in thin films. Our passivation technique is Forming Gas Annealing treatment. FGA acts passivation of interface and surface impurity or defects in SiO$_2$ film. We used RTP system for FGA and gained results that reduced surface fixed charge and trap density of midgap value.

a-Si Gate 구동회로의 Stepwise Gate 신호적용에 대한 연구

명재훈,곽진오,이준신,Myung, Jae-Hoon,Kwag, Jin-Oh,Yi, Jun-Sin 한국전기전자재료학회 2008 전기전자재료학회논문지 Vol.21 No.3

This paper investigated the a-si:H gate driver with the stepwise gate signal. In 1-chip type mobile LCD application the stepwise gate signal for low power consumption can be used by adding simple switching circuit. The power consumption of the a-Si:H gate driver can be decreased by employing the stepwise gate signal in the conventional circuit. In conventional one, the effect of stepwise gate signal can decrease slew rate and increase the fluctuation of gate-off state voltage, In order to increase the slew rate and decrease the gate off state fluctuation, we proposed a new a-Si:H TFT gate driver circuit. The simulation data of the new circuit show that the slew rate and the gate-off state fluctuation are improved, so the circuit can work reliably.

송전용 자기 애자의 경년에 의한 부식 메커니즘과 예방

김태용(Taeyong Kim),이준신(Junsin Yi) 대한전기학회 2021 대한전기학회 학술대회 논문집 Vol.2021 No.7