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엔트로피 필터 구현에 대한 Hardware Architecture
심휘보,강봉순 한국전기전자학회 2022 전기전자학회논문지 Vol.26 No.2
The concept of information entropy has been widely applied in various fields. Recently, in the field of imageprocessing, many technologies applying the concept of information entropy have been developed. As theimportance and demand of computer vision technologies increase in modern industry, real-time processing mustbe possible in order for image processing technologies to be efficiently applied to modern industries. Extractingthe entropy value of an image is difficult to process in real-time due to the complexity of computation insoftware, and a hardware structure of an image entropy filter capable of real-time processing has never beenproposed. In this paper, we propose for the first time a hardware structure of a histogram-based entropy filterthat can be processed in real time using a barrel shifter. The proposed hardware was designed using Verilog HDL,and Xilinx's xczu7ev-2ffvc1156 was set as the target device and FPGA was implemented. As a result of logicsynthesis using the Xilinx Vivado program, it has a maximum operating frequency of 750.751 MHz in a 4K UHDhigh-resolution environment, and it processes more than 30 images per second and satisfies the real-timeprocessing standard. 정보 엔트로피의 개념은 다양한 분야에서 폭넓게 응용되고 있다. 최근 영상처리 분야에서도 정보 엔트로피 개념을 응용한 기술들이 많이 개발되고 있다. 현대 산업에서 컴퓨터 비전 기술들의 중요성과 수요가 증가함에 따라, 영상처리 기술들이 현대 산업에 효율적으로 적용되기 위해서는 실시간 처리가 가능해야 한다. 영상의 엔트로피 값을 추출하는 것은 소프트웨어로는 계산량이 복잡해 실시간 처리가 어려우며 실시간 처리가 가능한 영상 엔트로피 필터의 하드웨어 구조는 제안된 적이 없다. 본 논문에서는 barrelshifter를 사용하여 실시간 처리가 가능한 히스토그램 기반 엔트로피 필터의 하드웨어 구조를 제안한다. 제안한 하드웨어는 VerilogHDL을 이용하여 설계하였고, Xilinx사의 xczu7ev-2ffvc1156을 Target device로 설정하여 FPGA 구현하였다. Xilinx Vivado프로그램을 이용한 논리합성 결과 4K UHD의 고해상도 환경에서 최대 동작 주파수 750.751MHz를 가지며, 1초에 30장 이상의영상을 처리하며 실시간 처리 기준을 만족함을 보인다.
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Haziness Degree Evaluator를 적용한 Hazy Particle Map 기반 자동화 안개 제거 방법
심휘보,강봉순,Sim, Hwi Bo,Kang, Bong Soon 한국멀티미디어학회 2022 멀티미디어학회논문지 Vol.25 No.9
With the recent development of computer vision technology, image processing-based mechanical devices are being developed to realize autonomous driving. The camera-taken images of image processing-based machines are invisible due to scattering and absorption of light in foggy conditions. This lowers the object recognition rate and causes malfunction. The safety of the technology is very important because the malfunction of autonomous driving leads to human casualties. In order to increase the stability of the technology, it is necessary to apply an efficient haze removal algorithm to the camera. In the conventional haze removal method, since the haze removal operation is performed regardless of the haze concentration of the input image, excessive haze is removed and the quality of the resulting image is deteriorated. In this paper, we propose an automatic haze removal method that removes haze according to the haze density of the input image by applying Ngo's Haziness Degree Evaluator (HDE) to Kim's haze removal algorithm using Hazy Particle Map. The proposed haze removal method removes the haze according to the haze concentration of the input image, thereby preventing the quality degradation of the input image that does not require haze removal and solving the problem of excessive haze removal. The superiority of the proposed haze removal method is verified through qualitative and quantitative evaluation.
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Hazy Particle Map 기반 실시간 처리 가능한 자동화 안개 제거방법의 하드웨어 구현
심휘보,강봉순,Sim, Hwi-Bo,Kang, Bong-Soon 한국전기전자학회 2022 전기전자학회논문지 Vol.26 No.3
Recently, image processing technology for autonomous driving by recognizing objects and lanes through camera images to realize autonomous vehicles is being studied. Haze reduces the visibility of images captured by the camera and causes malfunctions of autonomous vehicles. To solve this, it is necessary to apply the haze removal function that can be processed in real time to the camera. Therefore, in this paper, the fog removal method of Sim with excellent performance is implemented with hardware capable of real-time processing. The proposed hardware was designed using Verilog HDL, and FPGA was implemented by setting Xilinx's xc7z045-2ffg900 as the target device. As a result of logic synthesis using Xilinx Vivado program, it has a maximum operating frequency of 276.932MHz and a maximum processing speed of 31.279fps in a 4K (4096×2160) high-resolution environment, thus satisfying the real-time processing standard.
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