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이승우(Seung-Woo Lee),신홍규(Hong-Gyu Shin),조성익(Seong-Ik Cho) 대한전기학회 2011 전기학회논문지 P Vol.60 No.4
LEDs have small size, long lifespan, high reliability, low power consumption and high color efficiency. Using such a characteristics, LED Back Light Unit has been studying actively. This paper proposes LED driver to minimize power consumption due to LED forward voltage(VF) difference and temperature rising. Compared to conventional LED driver, the proposed driver have excellent stability, brief structure and linear output voltage of DC-DC boost converter. Proposed LED Driver circuit was designed using 0.35um CMOS technology. And its operation was verified through simulation.
지연단을 줄인 SMD 구조의 DCC를 가지는 DLL 설계
洪錫勇(Seok-Yong Hong),趙成翊(Seong-Ik Cho),辛烘圭(Hong-Gyu Shin) 대한전기학회 2007 전기학회논문지 Vol.56 No.6
DLLs(Delay Locked Loops) have widely been used in many systems in order to achieve the clock synchronization. A SMD (Synchronous Mirror Delay) structure is used both for skew reduction and for DCC (Duty Cycle Correction). In this paper, a SMD based DLL with DCC using Reduced Delay Lines is proposed in order to reduce the clock skew and correct the duty cycle. The merged structure allows the forward delay array to be shared between the DLL and the DCC, and yields a 25% saving in the number of the required delay cells. The designed chip was fabricated using a 0.25㎛ 1-poly, 4-metal CMOS process. Measurement results showed the 3% duty cycle error when the input signal ranges from 80% to 20% and the clock frequency ranges from 400㎒ to 600㎒. The locking operation needs 3 clock and duty correction requires only 5 clock cycles as feature with SMD structure
디코더 면적을 줄이는 새로운 전류구동 셀 매트릭스 DAC 구조
정상훈(Sang-Hun Jeong),신홍규(Hong-Gyu Shin),조성익(Seong-Ik Cho) 대한전기학회 2009 전기학회논문지 Vol.58 No.3
This paper presents a novel current steering cell matrix DAC(digital-to-analog converter) architecture to reduce decoder area. The current cell matrix of a existing architecture is selected by columns and lows thermometer code decoder of input bits. But The current cell matrix of a proposal architecture is divided 2n by the thermometer code decoder of upper input bits and are selected by the thermometer code decoder of middle and lower input bits. Because of this configuration, decoder numbers have increased. But the gate number that composed of decoder has decreased.. In case of the designed 8 bit current steering cell matrix DAC, the gate number of decoder has decreased by about 55% in comparison with a existing architecture.
클록 타이밍 조정에 의한 개선된 구조를 가지는 DWA 설계
김동균(Dong-Gyun Kim),신홍규(Hong-Gyu Shin),조성익(Seong-Ik Cho) 대한전기학회 2010 전기학회논문지 P Vol.59 No.4
In multibit Sigma-Delta Modulator, DWA(Data Weighted Averaging) among the DEM(Dynamic Element Matching) techniques was widely used to get rid of non-linearity that caused by mismatching of unit capacitor in feedback DAC path. this paper proposed the improved DWA architecture by adjusting clock timing of the existing DWA architecture. 2n Register block used for output was replaced with 2n S-R latch block. As a result of this, MOS Tr. can be reduced and extra clock can also be removed. Moreover, two n-bit Register block used to delay n-bit data code is decreased to one n-bit Register. In order to confirm characteristics, DWA for the 3-bit output with the proposed DWA architecture was designed on 0.18um process under 1.8V supply. Compared with the existing architecture, .It was able to reduce the number of 222 MOS Tr.
LED BLU의 최적 소비전력을 위한 선형적 피드백 제어기능을 가지는 드라이버 설계
이승우(Seung-Woo Lee),유남희(Nam-Hee Yu),조성익(Seong-Ik Cho),신홍규(Hong-Gyu Shin) 대한전기학회 2012 전기학회논문지 Vol.61 No.10
As demands for green industry increase, this paper proposes a power control technique that can substitute pre -existing CCFL(Cold Cathode Fluorescent Lamp) and optimize power consumption of LED BLU. This techique is designing LED driver circuit that make a DC-DC output voltage(VLED) to have a linear control function for a supply voltage of LED string. The proposed LED driver have an advantage that can increase or decrease a DC-DC output voltage compared with conventional LED driver. The designed LED driver circuit was designed using 0.35um CMOS technology. And its operation was verified through simulation.
辛烘圭,金煥溶 圓光大學校 1983 論文集 Vol.17 No.2
A low stability is in conventional current control type of regulator circuit using operational amplifier, i.e, when the base current of controlling main transistor varies by the ac input variation and the reference voltage varies by the load current variation, dc output voltage varies considerably. In order to solve this problem, an improved regulator circuit using transistor is proposed in this paper. As a result of experiment, its stability is improved remarkably notwithstanding the wide variation of the input voltage and load current.
SUS 304 마이크로 와이어 직선화 처리에 관한 연구
신홍규,김남수,김웅겸,홍남표,김병희,김헌영 江原大學校 産業技術硏究所 2004 産業技術硏究 Vol.24 No.A
In the study, we have developed a straightening system for the SUS 304 micro wires that are normally used in the medical and semi-conductor fields. To apply heat to the micro wires, we introduced the direct wire heating method which generates the thermal energy by the electrical resistance of the wire itself. To avoid the deterioration of the wire surface by the environment, such as the oxidation or the hydration, the N_(2) gas was filled in the glass pipe in which the straightening process was being performed. A precision tension meter was also attached to control the tension of the wire during the heating and straightening process. In order to control the straightening process, several experimental investigations with varying the tension, the feeding velocity and the temperature (current) was carried out. As a result of experiments, we obtained the optimal processing conditions satisfying the straightness requirement of the micro wires.
Analog to Digital and Digital to Analog Converters Using Switched Capacitor Amplifier
Huh, Do Geun,Shin, Hong Gyu,Lee, Jong In 원광대학교 공업기술개발연구소 1985 工業技術開發硏究誌 Vol.5 No.-
New design techniques of two kinds of analog to digital (A/D ) coverters and a digital to analog (D/A) converter, whose circuits are made up of Switched Capacitor (SC) Amplifier which has been presented by us are proposed. Also their characteristics and experimental results are discussed. Even though converters are equivalent to a conventional A/D or D/A converter system, it can be configured with only one MOS FET and a few SC circuit. So, it will be expect that these converter decrease component occupying area and consume less electric power in comparison with ordinary A/D converter system. In addition, as the capacitor of the A/D converter is much smaller capacity than ordinary A/D converter's integrating capacitor, the proposed A/D converter is fit for integrated circuit very much .