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Nanowire 구조를 갖는 GAA-FET의 Body Condition이 소자 특성에 미치는 영향 분석
이상혁(Sanghyuk Lee),서윤재(Yunejae Suh),경혜원(Hyewon Kyung),배중일(Jungil Bae),이동훈(Donghoon Lee),임기준(Kijun Lim),강대웅(Daewoong Kang) 대한전자공학회 2023 대한전자공학회 학술대회 Vol.2023 No.11
In this paper, a nanowire GAAFET device was manufactured using simulation. By varying the body thickness of the fabricated nanowire GAAFETs, we analyze their impact on device characteristics. we shown that, the reduction in body thickness improves the low power operation due to the structural characteristics inherent in the GAA structure.
3D NAND Flash Memory의 Charge Trap Layer(CTL) 두께 변화에 따른 소자 특성 분석
서윤재(Yunejae Suh),이상혁(Sanghyuk Lee),경혜원(Hyewon Kyung),배중일(Jungil Bae),이동훈(Donghoon Lee),임기준(Kijun Lim),강대웅(Daewoong Kang) 대한전자공학회 2023 대한전자공학회 학술대회 Vol.2023 No.11
In this study, we investigated the device characteristics with variations in the charge trap layer (CTL) by modifying the CTL thickness in 3D NAND Flash. As the CTL thickness decreases, cell current is reduced due to the higher capacitance value. However, ISPP slope degraded by the limit of physical CTL thickness. These trade-off characteristics show that an optimized CTL thickness can be proposed. Furthermore, this investigation can be applied to improve retention characteristics by optimizing the charge trap layer thickness and changing the structure.