http://chineseinput.net/에서 pinyin(병음)방식으로 중국어를 변환할 수 있습니다.
변환된 중국어를 복사하여 사용하시면 됩니다.
A Method for Reducing the Number of Metal Layers for Embedded LSI Package
오시마다이스케,모리켄타로,나카시마요시키,키쿠치카츠미,야마미치신다로,Ohshima, Daisuke,Mori, Kentaro,Nakashima, Yoshiki,Kikuchi, Katsumi,Yamamichi, Shintaro The Korean Microelectronics and Packaging Society 2010 마이크로전자 및 패키징학회지 Vol.17 No.4
We have successfully demonstrated a high-pin-count and thin embedded-LSI package to realize next generation's mobile terminals. The following three design key points were applied: (i) Using Cu posts, (ii) Using the coreless structure, (iii) Using a Cu plate as the ground plane. In order to quantitatively determine the contribution of the three points, the five-stage process for reducing the number of metal layers is described by means of the electrical simulation. The point-(i) and (ii) are effective from the viewpoint of the power integrity (PI); that is, these points play important roles in reducing the number of metal layers, and especially the point-(ii) contributes at least twice as the point-(i). The point-(iii) is not effective in the PI, but has a few effects on the signal integrity (SI). For reducing the number of metal layers, we should, at first, pay attention whether the PI characteristics fulfill the specification, and then we should confirm the SI characteristics.