RISS 학술연구정보서비스

검색
다국어 입력

http://chineseinput.net/에서 pinyin(병음)방식으로 중국어를 변환할 수 있습니다.

변환된 중국어를 복사하여 사용하시면 됩니다.

예시)
  • 中文 을 입력하시려면 zhongwen을 입력하시고 space를누르시면됩니다.
  • 北京 을 입력하시려면 beijing을 입력하시고 space를 누르시면 됩니다.
닫기
    인기검색어 순위 펼치기

    RISS 인기검색어

      검색결과 좁혀 보기

      선택해제
      • 좁혀본 항목 보기순서

        • 원문유무
        • 원문제공처
        • 등재정보
        • 학술지명
          펼치기
        • 주제분류
        • 발행연도
          펼치기
        • 작성언어
        • 저자
          펼치기

      오늘 본 자료

      • 오늘 본 자료가 없습니다.
      더보기
      • 무료
      • 기관 내 무료
      • 유료
      • Microscopic observation of primary break-up and droplet behavior near nozzle hole under diesel-like conditions

        ( Yijie Wei ),( Tie Li ),( Bin Wang ) 한국액체미립화학회 2017 한국액체미립화학회 학술강연회 논문집 Vol.2017 No.-

        To further understand fundamental mechanisms of primary breakup and mixture formation in diesel engines, high speed microscopic imaging of the near-nozzle fuel behavior during the injection processes was conducted under both non-evaporating and evaporating diesel-like conditions. Fuel was injected into a high temperature and high pressure constant volume chamber by two single-hole injectors with the diameters of 0.14 mm and 0.28 mm. The high speed CMOS camera with a long distance microscopy and the 60 kHz diode laser were employed to record the near-nozzle field injection processes. At the room temperature conditions, small droplets were observed at the spray tip at the start of injection and along the jet boundaries during the quasi-steady injection processes. During the end-of-injection transients, while there were some poorly-atomized large droplets and ligaments with low penetration velocity, the mist-like tiny droplets with diameter around 14 micrometer suspending at the vicinity of the nozzle dominated the droplet number distribution. Under the 4.0 MPa and 900 K ambient conditions, no droplets and ligaments at the spray tip and along the jet boundaries were clearly observed before the end of fuel injection. During the end-of-injection transients, owing to the low penetration velocity and sparse distribution of the fuel, some droplets were observed, indicating the surface tension confining the liquid to a sphere shape; at the same time, however, some cotton-like structures were also observed, implying the diminishment of the surface tension of the fuel. To clarify these phenomena, the transcritical/supercritical effects and beam steering by the unevenness ambient gas with the high temperature were discussed in details.

      • SCIESCOPUSKCI등재

        Development of Parallel Plate Avalanche Counter for heavy ion collision in radioactive ion beam

        Wei, Xianglun,Guan, Fenhai,Yang, Herun,Wang, Yijie,Zhang, Junwei,Ma, Peng,Diao, Xinyue,Lu, Chengui,Li, Meng,Guan, Yuanfan,Duan, Limin,Hu, Rongjiang,Zhang, Xiuling,Xiao, Zhigang Korean Nuclear Society 2020 Nuclear Engineering and Technology Vol.52 No.3

        We have developed a position-sensitive Parallel Plate Avalanche Counter (PPAC) to detect the fission fragments and reconstruct the fission reaction plane in the experiment of studying nuclear equation of state (nEOS) by means of heavy ion collision (HIC). This experiment put forward high requirements for the performances of PPAC, such as the time resolution, efficiency and position resolution. According to these requirements we designed the PPAC with an active area of 240 mm × 280 mm working at low gas pressure. The results show that time resolution could be less than 300 ps. Position resolution is consistent with the theoretical calculation about 1.35 mm. Detection efficiency could be approaching 100% gradually with the voltage increasing in different gas pressures. The performances of PPAC have also been verified in beam experiment. Each set of anode wires can be accurately separated in the position spectrum. In the beam experiment, we also got the back-to-back correlation of fission fragments which is one of the direct signals characterizing binary decay.

      • KCI등재

        Novel Interleaved Single-Stage AC/DC Converter with a High Power Factor and High Efficiency

        Yijie Wang,Wei Wang,Xiangjun Zhang,Dianguo Xu 전력전자학회 2011 JOURNAL OF POWER ELECTRONICS Vol.11 No.3

        A novel single-stage AC/DC converter with the soft-switching characteristic based on interleaving technology and an LLC topology is proposed here. The converter is integrated by an interleaved cell and an LLC cell. Because the components of the system are reduced as a result of integrating, the cost decreases. Since interleaving technology is adopted, the converter can work in a high voltage input state. The LLC topology chosen here ensures that the switches on the primary side work in the ZVS condition and that the diodes on the secondary side work in the ZCS condition, which decreases the switching loss of the system. A theoretical analysis and the design procedures of the proposed converter are proposed and discussed in detail. Simulations and experimental studies with a 100W prototype are done to prove the analysis.

      • SCOPUS

        Estimating the Worst-Case Execution Time of the Shared Data Cache in Integrated CPU-GPU Architectures

        Yijie Huangfu,Wei Zhang 한국정보과학회 2018 Journal of Computing Science and Engineering Vol.12 No.4

        Integrated CPU-GPU architectures have the potential to increase performance and energy efficiency for a variety of applications, due to their tight coupling of the CPU and GPU cores. However, in order to serve hard real-time and safetycritical applications, the integrated CPU-GPU architecture must be time-predictable and worst-case execution time (WCET) analyzable. In this work, we study the shared data last-level cache (LLC) in the integrated CPU-GPU architecture and propose an access interval-based method in order to estimate the worst-case cache misses of the LLC. The results indicate that the proposed technique can effectively improve the accuracy of the miss rate estimation in the LLC. We also find that the improved LLC miss rate estimations can be used to further improve the WCET estimations of the GPU kernels running on the integrated CPU-GPU architecture.

      • KCI등재

        Digital Control Methods of Two-Stage Electronic Ballast for Metal Halide Lamps with a ZVS-QSW Converter

        Yijie Wang,Xiangjun Zhang,Wei Wang,Dianguo Xu 전력전자학회 2010 JOURNAL OF POWER ELECTRONICS Vol.10 No.5

        This paper presents a new kind of digital control metal halide lamp electronic ballast. A zero-voltage-switch quasi-square-wave (ZVS-QSW) dual Buck converter is adopted here. In this paper, a digital control method is proposed to achieve ZVS for the converter. This ZVS can be realized during the whole working condition. Single-cycle-peak-current control is proposed to solve the problem of excessive inductor current during a low-frequency reversal transient. Power loop control is also realized and its consistency for different lamps is good. An AVR special microcontroller for a HID ballast is used to raise the control performance, and the low-frequency square-wave control method is adopted to avoid acoustic resonance. A 70W prototype was built in the laboratory. Experimental results show that the electronic ballast works reliably. Furthermore, the efficiency of the ballast can be higher than 92%.

      • SCOPUS

        Enhancing GPU Performance by Efficient Hardware-Based and Hybrid L1 Data Cache Bypassing

        Yijie Huangfu,Wei Zhang 한국정보과학회 2017 Journal of Computing Science and Engineering Vol.11 No.2

        Recent GPUs have adopted cache memory to benefit general-purpose GPU (GPGPU) programs. However, unlike CPU programs, GPGPU programs typically have considerably less temporal/spatial locality. Moreover, the L1 data cache is used by many threads that access a data size typically considerably larger than the L1 cache, making it critical to bypass L1 data cache intelligently to enhance GPU cache performance. In this paper, we examine GPU cache access behavior and propose a simple hardware-based GPU cache bypassing method that can be applied to GPU applications without recompiling programs. Moreover, we introduce a hybrid method that integrates static profiling information and hardware- based bypassing to further enhance performance. Our experimental results reveal that hardware-based cache bypassing can boost performance for most benchmarks, and the hybrid method can achieve performance comparable to state-of-the-art compiler-based bypassing with considerably less profiling cost.

      • SCOPUS

        Warp-Based Load/Store Reordering to Improve GPU Time Predictability

        Yijie Huangfu,Wei Zhang 한국정보과학회 2017 Journal of Computing Science and Engineering Vol.11 No.2

        While graphics processing units (GPUs) can be used to improve the performance of real-time embedded applications that require high throughput, it is challenging to estimate the worst-case execution time (WCET) of GPU programs, because modern GPUs are designed for improving the average-case performance rather than time predictability. In this paper, a reordering framework is proposed to regulate the access to the GPU data cache, which helps to improve the accuracy of the estimation of GPU L1 data cache miss rate with low performance overhead. Also, with the improved cache miss rate estimation, tighter WCET estimations can be achieved for GPU programs.

      • SCIESCOPUSKCI등재

        Novel Interleaved Single-Stage AC/DC Converter with a High Power Factor and High Efficiency

        Wang, Yijie,Wang, Wei,Zhang, Xiangjun,Xu, Dianguo The Korean Institute of Power Electronics 2011 JOURNAL OF POWER ELECTRONICS Vol.11 No.3

        A novel single-stage AC/DC converter with the soft-switching characteristic based on interleaving technology and an LLC topology is proposed here. The converter is integrated by an interleaved cell and an LLC cell. Because the components of the system are reduced as a result of integrating, the cost decreases. Since interleaving technology is adopted, the converter can work in a high voltage input state. The LLC topology chosen here ensures that the switches on the primary side work in the ZVS condition and that the diodes on the secondary side work in the ZCS condition, which decreases the switching loss of the system. A theoretical analysis and the design procedures of the proposed converter are proposed and discussed in detail. Simulations and experimental studies with a 100W prototype are done to prove the analysis.

      • Suppression of PTRF Alleviates the Polymicrobial Sepsis Induced by Cecal Ligation and Puncture in Mice

        Zheng, Yijie,Lee, Seonjin,Liang, Xiaoliang,Wei, Shuquan,Moon, Hyung-Geun,Jin, Yang Oxford University Press 2013 The Journal of infectious diseases Vol.208 No.11

        <P><B><I>Background.</I></B> Sepsis and sepsis-associated organ failure are devastating conditions. Understanding the detailed cellular/molecular mechanisms involved in sepsis should lead to the identification of novel therapeutic targets.</P><P><B><I>Methods.</I></B> Cecal ligation and puncture (CLP) was used as a polymicrobial sepsis model in vivo to determine mortality and end-organ damage. Macrophages were adopted as the cellular model in vitro for mechanistic studies.</P><P><B><I>Results.</I></B> PTRF+/− mice survived longer and suffered less organ damage after CLP. Reductions in nitric oxide (NO) and iNOS biosynthesis were observed in plasma, macrophages, and vital organs in the PTRF+/− mice. Using an acute sepsis model after CLP, we found that iNOS−/− mice had a comparable level of survival as the PTRF+/− mice. Similarly, polymerase I transcript release factor (PTRF) deficiency resulted in decreased iNOS and NO/ROS production in macrophages in vitro. Mechanistically, lipopolysaccharide (LPS) enhanced the co-localization and interaction between PTRF and TLR4 in lipid rafts. Deletion of PTRF blocked formation of the TLR4/Myd88 complex after LPS. Consistent with this, lack of PTRF impaired the TLR4 signaling, as shown by the decreased p-JNK, p-ERK, and p-p38, which are upstream factors involved in iNOS transcription.</P><P><B><I>Conclusion.</I></B> PTRF is a crucial regulator of TLR4 signaling in the development of sepsis.</P>

      • SCIESCOPUSKCI등재

        Digital Control Methods of Two-Stage Electronic Ballast for Metal Halide Lamps with a ZVS-QSW Converter

        Wang, Yijie,Zhang, Xiangjun,Wang, Wei,Xu, Dianguo The Korean Institute of Power Electronics 2010 JOURNAL OF POWER ELECTRONICS Vol.10 No.5

        This paper presents a new kind of digital control metal halide lamp electronic ballast. A zero-voltage-switch quasi-square-wave (ZVS-QSW) dual Buck converter is adopted here. In this paper, a digital control method is proposed to achieve ZVS for the converter. This ZVS can be realized during the whole working condition. Single-cycle-peak-current control is proposed to solve the problem of excessive inductor current during a low-frequency reversal transient. Power loop control is also realized and its consistency for different lamps is good. An AVR special microcontroller for a HID ballast is used to raise the control performance, and the low-frequency square-wave control method is adopted to avoid acoustic resonance. A 70W prototype was built in the laboratory. Experimental results show that the electronic ballast works reliably. Furthermore, the efficiency of the ballast can be higher than 92%.

      연관 검색어 추천

      이 검색어로 많이 본 자료

      활용도 높은 자료

      해외이동버튼