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      • KCI우수등재

        Brief Review of Silicon Solar Cells

        Junsin Yi(이준신) 한국진공학회(ASCT) 2007 Applied Science and Convergence Technology Vol.16 No.3

        태양광발전이란 태양에너지를 직접 전기 에너지로 변환시키는 것이다. 지난 5년 동안 태양광발전은 세계적으로 높은 성장률을 보여 왔다. 특히 2006년에는 30%이상의 성장을 가져왔으며 앞으로 20년 동안 평균 생산 성장률은 매년 27% - 34%가 될 것으로 예상하고 있다. 현재까지는 태양광발전을 이용해 생산된 전력의 가격은 기존 전력발전의 가격보다 높지만 태양광 기술의 발전과 효율의 향상으로 점점 그 가격이 떨어지고 있다. 뿐만 아니라 태양전지용의 실리콘 기판의 대량생산은 점점 더 태양전지의 가격 저하를 가져오고 있다. 태양전지의 변화효율의 한계는 30%이다. 현재에는 결정질 실리콘 태양전지가 주를 이루고 있지만 미래에는 박막 실리콘 태양전지가 주도를 이룰 것이다. 2030년에는 박막 태양전지가 90% 이상을 이루고 결정질 태양전지는 10% 이하로 떨어질 것을 예상하고 있다. 성균관대학교에서는 결정질 실리콘 태양전지의 저가화와 고효율화를 주 연구로 수행하고 있다. 현재 성균관대학교에서는 스크린 프린트를 이용해서 16% 이상의 다결정 실리콘 태양전지와 17% 이상의 단결정 실리콘 태양전지를 성공적으로 제작하였다. 제 1세대에서 다음 세대의 태양전지 발전의 과정은 새로운 접근법으로 확대되지만 여전히 실리콘이 지금까지 주된 재료로 쓰이고 있다. 2010년까지 이러한 기술들에 대한 격차는 여전히 있지만 태양광발전을 통한 전력생산의 가격은 60 cent/watt 정도로 예상하고 있다. 태양광발전은 청정에너지로서 재생불가능 하고 고갈되어가고 환경오염을 일으키는 다른 에너지와 비교하여 점점 대체에너지로서의 자리를 확립해 가고 있다. Photovoltaic (PV) technology permits the transformation of solar light directly into electricity. For the last five years, the photovoltaic sector has experienced one of the highest growth rates worldwide (over 30% in 2006) and for the next 20 years, the average production growth rate is estimated to be between 27% and 34% annually. Currently the cost of electricity produced using photovoltaic technology is above that for traditional energy sources, but this is expected to fall with technological progress and more efficient production processes. A large scale production of solar grade silicon material of high purity could supply the world demand at a reasonably lower cost. A shift from crystalline silicon to thin film is expected in the future. The technical limit for the conversion efficiency is about 30%. It is assumed that in 2030 thin films will have a major market share (90%) and the share of crystalline cells will have decreased to 10%. Our research at Sungkyunkwan University of South Korea is confined to crystalline silicon solar cell technology. We aim to develop a technology for low cost production of high efficiency silicon solar cell. We have successfully fabricated silicon solar cells of efficiency more than 16% starting with multicrystalline wafers and that of efficiency more than 17% on single crystalline wafers with screen printing metallization. The process of transformation from the first generation to second generation solar cell should be geared up with the entry of new approaches but still silicon seems to remain as the major material for solar cells for many years to come. Local barriers to the implementation of this technology may also keep continuing up to year 2010 and by that time the cost of the solar cell generated power is expected to be 60 cent per watt. Photovoltaic source could establish itself as a clean and sustainable energy alternate to the ever depleting and polluting non-renewable energy resource.

      • KCI등재

        고효율 결정질 실리콘 태양전지 적용을 위한 p타입 에미터 표면의 전계 효과를 이용한 실리콘 산화막 패시베이션

        박수영 ( Sooyoung Park ),심경배 ( Gyungbae Shim ),한상욱 ( Sanguk Han ),안시현 ( Shihyun Ahn ),박철민 ( Cheolmin Park ),조영현 ( Younghyun Cho ),김현후 ( Hyunhoo Kim ),이준신 ( Junsin Yi ) 한국신·재생에너지학회 2017 신재생에너지 Vol.13 No.4

        The surface passivation is one of the crucial steps to achieve high conversion efficiencies in c-Si solar cells. A thermally stable thin film with a negative charge (for p-type surface) passivation layer is required to develop a good front passivation suitable for n-type c-Si solar cells. Silicon suboxide (SiOX) layer using PECVD provides a good passivation layer which has low temperature process and charge control in thin-film layer. In this paper, a PECVD stack layer consisting of SiOX and SiNX was employed for front side passivation. The optimal refractive index of SiOX and SiNX were found by varying the silane (SiH<sub>4</sub>), ammonia (NH<sub>3</sub>) and nitrous oxide (N<sub>2</sub>O) gas ratio for decrease optical loss. -1.71 × 10 <sup>11</sup> cm<sup> -2</sup> of negative charge (Q<sub>f</sub>) and 5×10 10 cm <sup>-2</sup> eV <sup>-1</sup> of D<sub>it</sub> (interface trap density) were obtained at 10 nm thick SiOX thin-film. With this optimized SiOx/SiNx stack layer on p <sup>+</sup> surface wafer using PECVD, the effective lifetime of 280 ㎲ and implied VOC of 690 mV were achieved. It is expected that the efficiency of the n-type silicon solar cell can be improved by applying the optimized SiOx condition to the front passivation layer.

      • KCI등재

        NH<sub>3</sub> Plasma Treatment를 사용한 고성능 TFT 제작 및 분석

        박희준,이준신,Park, Heejun,Nguyen, Van Duy,Yi, Junsin 한국전기전자재료학회 2017 전기전자재료학회논문지 Vol.30 No.8

        The effect of $NH_3$ plasma treatment on device characteristics was confirmed for an optimized thin film transistor of poly-Si formed by ELA. When C-V curve was checked for MIS (metal-insulator-silicon), Dit of $NH_3$ plasma treated and MIS was $2.7{\times}10^{10}cm^{-2}eV^{-1}$. Also in the TFT device case, it was decreased to the sub-threshold slope of 0.5 V/decade, 1.9 V of threshold voltage and improved in $26cm^2V^{-1}S^{-1}$ of mobility. Si-N and Si-H bonding reduced dangling bonding to each interface. When gate bias stress was applied, the threshold voltage's shift value of $NH_3$ plasma treated device was 0.58 V for 1,000s, 1.14 V for 3,600s, 1.12 V for 7,200s. As we observe from this quality, electrical stability was also improved and $NH_3$ plasma treatment was considered effective for passivation.

      • KCI등재

        박막트랜지스터 응용을 위한 SiO<sub>2</sub> 박막 특성 연구

        서창기,심명석,이준신,Seo, Chang-Ki,Shim, Myung-Suk,Yi, Junsin 한국전기전자재료학회 2004 전기전자재료학회논문지 Vol.17 No.6

        Silicon dioxide (SiO$_2$) is widely used as a gate dielectric material for thin film transistors (TFT) and semiconductor devices. In this paper, SiO$_2$ films were grown by APCVD(Atmospheric Pressure chemical vapor deposition) at the high temperature. Experimental investigations were carried out as a function of $O_2$ gas flow ratios from 0 to 200 1pm. This article presents the SiO$_2$ gate dielectric studies in terms of deposition rate, refrative index, FT-IR, C-V for the gate dielectric layer of thin film transistor applications. We also study defect passivation technique for improvement interface or surface properties in thin films. Our passivation technique is Forming Gas Annealing treatment. FGA acts passivation of interface and surface impurity or defects in SiO$_2$ film. We used RTP system for FGA and gained results that reduced surface fixed charge and trap density of midgap value.

      • KCI등재

        N-type 고효율 태양전지용 Boron Diffused Layer의 형성 방법 및 특성 분석

        심경배,박철민,이준신,Shim, Gyeongbae,Park, Cheolmin,Yi, Junsin 한국전기전자재료학회 2017 전기전자재료학회논문지 Vol.30 No.3

        N-type crystalline silicon solar cells have high metal impurity tolerance and higher minority carrier lifetime that increases conversion efficiency. However, junction quality between the boron diffused layer and the n-type substrate is more important for increased efficiency. In this paper, the current status and prospects for boron diffused layers in N-type crystalline silicon solar cell applications are described. Boron diffused layer formation methods (thermal diffusion and co-diffusion using $a-SiO_X:B$), boron rich layer (BRL) and boron silicate glass (BSG) reactions, and analysis of the effects to improve junction characteristics are discussed. In-situ oxidation is performed to remove the boron rich layer. The oxidation process after diffusion shows a lower B-O peak than before the Oxidation process was changed into $SiO_2$ phase by FTIR and BRL. The $a-SiO_X:B$ layer is deposited by PECVD using $SiH_4$, $B_2H_6$, $H_2$, $CO_2$ gases in N-type wafer and annealed by thermal tube furnace for performing the P+ layer. MCLT (minority carrier lifetime) is improved by increasing $SiH_4$ and $B_2H_6$. When $a-SiO_X:B$ is removed, the Si-O peak decreases and the B-H peak declines a little, but MCLT is improved by hydrogen passivated inactive boron atoms. In this paper, we focused on the boron emitter for N-type crystalline solar cells.

      • 송전용 자기 애자의 표면에너지 제어를 위한 소수성 코팅

        김태용 (Taeyong Kim),이준신(Junsin Yi) 대한전기학회 2021 대한전기학회 학술대회 논문집 Vol.2021 No.10

        송전선로의 세라믹 절연체의 오염물 부착에 의한 누설전류 발생을 해결하기 위해 표면의 소수성 코팅을 적용하였다. 본 연구에서는 Permanent protector 640을 이용하여 적용하였으며, 추후에는 대기압 플라즈마를 이용하여 다양한 물질에 대해서 적용할 예정이다.

      • KCI등재

        CO<sub>2</sub>가스를 이용하여 증착된 터널층의 계면포획밀도의 감소와 이를 적용한 저전력비휘발성 메모리 특성

        이소진,장경수,김태용,이준신,Lee, Sojin,Jang, Kyungsoo,Nguyen, Cam Phu Thi,Kim, Taeyong,Yi, Junsin 한국전기전자재료학회 2016 전기전자재료학회논문지 Vol.29 No.7

        The silicon dioxide ($SiO_2$) was deposited using various gas as oxygen and nitrous oxide ($N_2O$) in nowadays. In order to improve electrical characteristics and the interface state density ($D_{it}$) in low temperature, It was deposited with carbon dioxide ($CO_2$) and silane ($SiH_4$) gas by inductively coupled plasma chemical vapor deposition (ICP-CVD). Each $D_{it}$ of $SiO_2$ using $CO_2$ and $N_2O$ gas was $1.30{\times}10^{10}cm^{-2}{\cdot}eV^{-1}$ and $3.31{\times}10^{10}cm^{-2}{\cdot}eV^{-1}$. It showed $SiO_2$ using $CO_2$ gas was about 2.55 times better than $N_2O$ gas. After 10 years when the thin film was applied to metal/insulator/semiconductor(MIS)-nonvolatile memory(NVM), MIS NVM using $SiO_2$($CO_2$) on tunneling layer had window memory of 2.16 V with 60% retention at bias voltage from +16 V to -19 V. However, MIS NVM applied $SiO_2$($N_2O$) to tunneling layer had 2.48 V with 61% retention at bias voltage from +20 V to -24 V. The results show $SiO_2$ using $CO_2$ decrease the $D_{it}$ and it improves the operating voltage.

      • KCI등재

        베이지안 방법론을 적용한 154 kV 송전용 자기애자의 수명 평가 개발

        최인혁,김태균,윤용범,이준신,김성욱,Choi, In-Hyuk,Kim, Tae-Kyun,Yoon, Yong-Beum,Yi, Junsin,Kim, Seong Wook 한국전기전자재료학회 2017 전기전자재료학회논문지 Vol.30 No.9

        It is extremely important to improve methodologies for the lifetime assessment of porcelain insulators. While there has been a considerable amount of work regarding the phenomena of lifetime distributions, most of the studies assume that aging distributions follow the Weibull distribution. However, the true underlying distribution is unknown, giving rise to unrealistic inferences, such as parameter estimations. In this article, we review several distributions that are commonly used in reliability and survival analysis, such as the exponential, Weibull, log-normal, and gamma distributions. Some properties, including the characteristics of failure rates of these distributions, are presented. We use a Bayesian approach for model selection and parameter estimation procedures. A well-known measure, called the Bayes factor, is used to find the most plausible model among several contending models. The posterior mean can be used as a parameter estimate for unknown parameters, once a model with the highest posterior probability is selected. Extensive simulation studies are performed to demonstrate our methodologies.

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