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RISS 인기검색어
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- 저자 : 김원기(Won-Gi Kim) (검색결과 48 건)
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김원기,김남현,허재만,Kim, Won-Gi,Kim, Nam-Hyeon,Huh, Jae-Man 대한의용생체공학회 1990 의공학회지 Vol.11 No.2
A workstation for archiving and communication of medical records is developed for clinical use in hospital. In this system, handwritten diagnostic reports, medical recording papers such as ECG and EEG etc., and ultrasound images are stored in optical disks instead of papers. This system improves medical service owing to speedy diagnosis by fast finding the patient's medical chart, and curtails the cost of archiving medical charts economically. If this system can be combined with already developed MPACS, then integrated medical image di- agnosis will be possible.
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김원기,Kim, Won-Gi 한국기술사회 2011 技術士 Vol.44 No.3
According to Natural disasters due to extreme weather, In particular earthquake, It has become important to avoid by aseismic design. Do not entrust with it to non-specialists. By all means, It has to be Structural Professional Engineers. Therefore, foresee and Prevent problems in the near future.
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김원기,김명균,강성호,한건희,Kim, Won-Gi,Kim, Myung-Gyun,Kang, Sung-Ho,Han, Gun-Hee 한국정보처리학회 2000 정보처리논문지 Vol.7 No.10
반도체 집적 회로가 점점 복잡해지고 고속화되면서 반도체 집적 회로의 동작에 대한 검사 뿐 아니라, 회로가 원하는 시간 내에 동작함을 보장하는 지연 고장 검사의 중요성이 점점 커지고 있다. 본 논문에서는 경로 지연 고장에 대한 효율적인 테스트 입력 생성을 위하여 새로운 부분 확장 주사 방법을 제안한다. 본 논문에서는 유추와 할당을 적용한 테스트 입력 자동 생성기를 기반으로 하여 새로운 부분 주사 방법을 구현하였다. 우선적으로 표준 주사환경에서 테스트 입력을 생성한 후에 테스트 입력이 제대로 생성되지 않은 주사 사슬에 대하여 테스트 입력 생성기를 수행하는 동안의 정보를 이용하여 확장 주사 플립플롭이 적용될 플립플롭을 결정하였다. 확장 주사 플립플롭을 결정하는 기준으로서는 고장 검출율과 하드웨어 오버헤드를 사용하였다. 순차 회로인 ISCAS 89 벤치 마크 회로를 이용하여 실험을 수행하였으며, 실험을 통하여 표준 주사와 확장 주사 환경, 부분 확장 주사 환경에서 고장 검출율을 비교, 확인하였다. 그리고 새로운 알고리즘이 적용된 부분 확장 주사 방법에서 높은 고장 검출율을 확인함으로써 효율성을 입증하였다. The more complex and larger semiconductor integraed circuits become, the core important delay test becomes which guarantees that semiconductor integrated circuits operate in time. In this paper, we propose a new partial enhanced scan method that can generate test patterns for path delay faults offectively. We implemented a new partial enhanced scan method based on an automatic test pattern generator(ATPG) which uses implication and justification . First. we generate test patterns in the standard scan environment. And if test patterns are not generated regularly in the scan chain, we determine flip-flops which applied enhanced scan flip-flops using the information derived for running an automatic test pattern generator inthe circuti. Determming enhanced scan flip-flops are based on a fault coverage or a hardware overhead. through the expenment for JSCAS 89 benchmark sequential circuits, we compared the fault coverage in the standard scan enviroment and enhance scan environment, partial enhanced scan environment. And we proved the effectiveness of the new partial enhanced scan method by identifying a high fault coverage.
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김원기 ( Won Gi Kim ),김명균 ( Myung Gyun Kim ),강성호 ( Sungho Kang ),한건희 ( Gunhee Han ) 한국정보처리학회 2000 정보처리학회논문지 Vol.7 No.10
delay test becomes which guarantees that semiconductor integrated circuits operate in time. In this paper, we propose a new partial enhanced scan method that can generate test patterns for path delay faults effectively. We implemented a new partial enhanced scan method based on an automatic test pattern generator(ATPG) which uses implication and justification. First, we generate test patterns in the standard scan environment. And if test patterns are not generated regularly in the scan chain, we determine flip-flops which applied enhanced scan flip-flops using the information derived for running an automatic test pattern generator in the circuit. Determining enhanced scan flip-flops are based on a fault coverage or a hardware overhead. Through the experiment for ISCAS 89 benchmark sequential circuits, we compared the fault coverage in the standard scan environment and enhance scan environment, partial enhanced scan environment. And we proved the effectiveness of the new partial enhanced scan method by identifying a high fault coverage.
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스캔 환경에서 간접 유추 알고리즘을 이용한 경로 지연 고장 검사 입력 생성기
김원기(Kim Won Gi),김명균(Kim Myoung Gyun),강성호(Kang Sung Ho) 한국정보처리학회 1999 정보처리학회논문지 Vol.6 No.6
The more complex and large digital circuits become, the more important delay test becomes which guarantees that circuits operate in time. In this paper, the proposed algorithm is developed, which enable the fast indirect implication for efficient test pattern generation in sequential circuits of standard scan environment. Static learning algorithm enables application of a new implication value using contrapositive proposition. The static learning procedure found structurally, analyzes the gate structure in the preprocessing phase and store the information of learning occurrence so that it can be used in the test pattern generation procedure if it satisfies the implication condition. If there exists a signal line which include all paths from some particular primary inputs, it is a partitioning point. If paths passing that point have the same partial path from primary input to the signal or from the signal to primary output, they will need the same primary input values which separated by the partitioning point. In this paper test pattern generation can be more effective by using this partitioning technique. Finally, an efficient delay fault test pattern generator using indirect implication is developed and the effectiveness of these algorithms is demonstrated by experiments.
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김원기 ( Won Gi Kim ),조주영 ( Joo Young Cho ),최한철 ( Han Cheol Choe ),이호종 ( Ho Jong Lee ) 한국부식방식학회(구 한국부식학회) 2010 Corrosion Science and Technology Vol.9 No.5
NiTi alloy has been used for orthodontic wire due to good mechanical properties, such as elastic strength, friction resistance, and high corrosion resistance. Recently, these wire were coated by polymer and ceramic materials for aesthetics. The purpose of this study was to investigate electrochemical characteristics of tooth colored NiTi wire using various instruments. Wires (round type and rectangular type) were used, respectively, for experiment. Polymer coating was carried out for wire. Specimen was investigated with optical microscopy (OM), field emission scanning electron microscopy (FE-SEM) and energy dispersive x-ray spectroscopy (EDS). The corrosion properties of the specimens were examined using potentiodynan1ic tests (potential range of -1500~2000 mV) and electrochemical impedance spectroscopy (frequency range of 100 kHz~10 mHz) in a 0.9% NaCl solution by potentiostat. From the results of polarization behavior, the passive region of non-coated NiTi wire showed largely, whereas, the passive region of curved NiTi wire showed shortly in anodic polarization curve. In the case of coated NiTi wire, pitting and crevice corrosion occurred severely at interlace between non-coated and coated region. From the results of EIS, polarization resistance(Rp) value of non-coated round and rectangular NiTi wire at curved part showed 5.10×10(2) Ωcm2 and 4.43×10(5) Ωcm2, lower than that of coated NiTi wire. Rp of coated round and rectangular NiTi wire at curved part showed 1.31×l0(6) Ωcm2 and 1.19×10(6) Ωcm2.
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