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RISS 인기검색어
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- 저자 : Phan Quoc Dzung (검색결과 3 건)
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Selective Harmonic Elimination for Cascaded Multilevel Inverters Using Grey Wolf Optimizer Algorithm
Phan Quoc Dzung,Nguyen The Tien,Nguyen Dinh Tuyen,Hong-Hee Lee 전력전자학회 2015 ICPE(ISPE)논문집 Vol.2015 No.6
In this paper, Grey Wolf Optimizer (GWO) algorithm is applied to determine optimum switching angles for cascaded multilevel inverter of eliminating some high order harmonics while maintaining the required fundamental voltage. As case study in this paper, 11-level and 15-level inverter are considered and the optimum switching angles are calculated off-line to eliminate the 5th, 7th, 11th, 13th harmonics for the 11-level as well as 17th, 19th harmonics for 15-level. The total harmonic distortion is used to estimate the quality of output voltages. The results are shown graphically for better understanding, the mathematical formulations and simulation results will be presented.
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Carrier Phase-Shift PWM to Reduce Common-Mode Voltage for Three-Level T-Type NPC Inverters
Nguyen, Tuyen D.,Phan, Dzung Quoc,Dao, Dat Ngoc,Lee, Hong-Hee The Korean Institute of Power Electronics 2014 JOURNAL OF POWER ELECTRONICS Vol.14 No.6
Common-mode voltage (CMV) causes overvoltage stress to winding insulation and damages AC motors. CMV with high dv/dt causes leakage currents, which create noise problems for equipment installed near the converter. This study proposes a new pulse-width modulation (PWM) strategy for three-level T-type NPC inverters. This strategy substantially eliminates CMV. The principle for selecting suitable triangle carrier signals for the three-level T-type NPC is described. The proposed method can mitigate the peak value of CMV by 50% compared with the phase disposition pulse-width modulation method. Furthermore, the proposed method exhibits better harmonic spectrum and lower root mean square value for the CMV than those of the reduced-CMV method on the basis of the phase opposition disposition PWM scheme with modulation index higher than 0.5. The proposed modulation can easily be implemented using software without any additional hardware modifications. Both simulation and experimental results demonstrate that the proposed carrier phase-shift PWM method has good output waveform performance and reduces CMV.
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Carrier Phase-Shift PWM to Reduce Common-Mode Voltage for Three-Level T-Type NPC Inverters
Tuyen D. Nguyen,Dzung Quoc Phan,Dat Ngoc Dao,Hong-Hee Lee 전력전자학회 2014 JOURNAL OF POWER ELECTRONICS Vol.14 No.6
Common-mode voltage (CMV) causes overvoltage stress to winding insulation and damages AC motors. CMV with high dv/dt causes leakage currents, which create noise problems for equipment installed near the converter. This study proposes a new pulse-width modulation (PWM) strategy for three-level T-type NPC inverters. This strategy substantially eliminates CMV. The principle for selecting suitable triangle carrier signals for the three-level T-type NPC is described. The proposed method can mitigate the peak value of CMV by 50% compared with the phase disposition pulse-width modulation method. Furthermore, the proposed method exhibits better harmonic spectrum and lower root mean square value for the CMV than those of the reduced-CMV method on the basis of the phase opposition disposition PWM scheme with modulation index higher than 0.5. The proposed modulation can easily be implemented using software without any additional hardware modifications. Both simulation and experimental results demonstrate that the proposed carrier phase-shift PWM method has good output waveform performance and reduces CMV.
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