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        Recessed Gate Cylindrical Heterostructure TFET, a Device with Extremely Steep Subthreshold Swing

        Danial Keighobadi,Saeed Mohammadian Semnani,Mohaddeseh Mohtaram 한국전기전자재료학회 2022 Transactions on Electrical and Electronic Material Vol.23 No.1

        In this paper, we present a novel cylindrical gate-all-around heterostructure TFET that benefits from recessed gate architecture to enable line tunneling of charge carriers normal to the gate at InGaAs/InP heterojunction. In the proposed TFET, the channel and drain regions are composed of a wide-bandgap semiconductor which results in a considerable suppression of ambipolar conduction and off-state current. The device characteristics are investigated by numerical simulations and the results indicate impressive switching performance of the proposed transistor. Owing to designed geometry and employed material system, we obtain an extremely steep subthreshold swing, sub 3mv/dec over 6 decades of drain current, sub 60mv/dec over 10 decades of drain current, and average subthreshold swing of 21mv/dec, an on-state to off-state current ratio of about 10 12 , and an on-state current of about 100nA at V GS = 0.3 V. The influence of variations in the device dimensions, doping and bias condition on its electrical characteristics is also studied and discussed physically.

      • KCI등재

        Switching Performance Investigation of a Gate-All-Around Core-Source InGaAs/InP TFET

        Danial Keighobadi,Saeed Mohammadian Semnani,Mohaddeseh Mohtaram 한국전기전자재료학회 2021 Transactions on Electrical and Electronic Material Vol.22 No.4

        A novel core-source gate-all-around TFET based on InGaAs/InP heterojunction is presented in this paper. In the proposed device, the main current flow mechanism is line tunneling which occurs across a heterojunction composed of a narrowbandgap material of source and a wide-bandgap material of channel. The off-state current and ambipolar conduction are diminished by simultaneously employing two different doping concentrations in the channel region, as well as a wide-bandgap material in drain region. We study the switching performance of the device using a calibrated numerical device simulator. The results indicate impressive performance of the proposed transistor, including an extremely steep subthreshold swing, sub 3mv/dec over 5 decades and sub 60mv/dec over 9 decades of drain current, and average subthreshold swing of about 27mv/dec, and an on-state to off-state current ratio of about 10 11 at V GS = 0.3 V. The impact of variations in the device dimensions, doping and bias condition on its electrical characteristics is also studied and discussed physically.

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