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OVERSAMPLED ∑-Δ A/D AND D/A CONVERTERS FOR LOW-POWER , LOW-VOLTAGE DIGITAL VOICE TERMINALS
Strle,Drago 대한전자공학회 1995 ICVC : International Conference on VLSI and CAD Vol.4 No.1
Design of oversampled ∑-△ A/D and D/A converters used in low-power, low-voltage digital voice terminal is presented in this article. The power consumption is reduced by reducing supply voltage down-to 4^*V_(TH) that is for 1㎛ CMOS process with V_(THn)= V_(THp) = 0.5V ague to V_(sup) ≥ 2.0V. The design of digital decimation and interpolation filters is based on the sine architecture with very careful logic and circuit design to avoid unnecessary transitions. The architecture of the analog sections are fully differential second order modulator and I bit D/A wish 2nd order Chebishev S-C filter. The achicved linearity is 13 bits and resolution of 14 bits at V_(sup)= 2.0V. The measured power consumption of a complete ∑-△ A/D and D/A wish oversampling frequency of 1MHz is 1.2mW. Area needed for the modulator and one bit D/A with 2nd order S-C filter is 1.7 ㎟.